-
1
-
-
0038819566
-
"Substrate transfer for RF technologies"
-
Jun.
-
R. Dekker, P. G. M. Baltus, and H. G. R. Maas, "Substrate transfer for RF technologies," IEEE Trans. Electron Devices, vol. 50, no. 6, pp. 747-757, Jun. 2003.
-
(2003)
IEEE Trans. Electron Devices
, vol.50
, Issue.6
, pp. 747-757
-
-
Dekker, R.1
Baltus, P.G.M.2
Maas, H.G.R.3
-
2
-
-
0742269327
-
"A wafer-scale membrane transfer process for the fabrication of optical quality, large continuous membranes"
-
E.-H. Yang and D. V. Wiberg, "A wafer-scale membrane transfer process for the fabrication of optical quality, large continuous membranes," J. Microelectromech. Syst., vol. 12, pp. 804-815, 2003.
-
(2003)
J. Microelectromech. Syst.
, vol.12
, pp. 804-815
-
-
Yang, E.-H.1
Wiberg, D.V.2
-
3
-
-
0035605842
-
"Low-temperature wafer-level transfer bonding"
-
F. Niklaus, P. Enoksson, P. Griss, E. Kalvesten, and G. Stemme, "Low-temperature wafer-level transfer bonding," J. Microelectromech. Syst., vol. 10, pp. 525-531, 2001.
-
(2001)
J. Microelectromech. Syst.
, vol.10
, pp. 525-531
-
-
Niklaus, F.1
Enoksson, P.2
Griss, P.3
Kalvesten, E.4
Stemme, G.5
-
4
-
-
2342563124
-
"Strained Si, SiGe, and Ge on-insulator: Review of wafer bonding fabrication techniques"
-
G. Taraschi, A. J. Pitera, and E. A. Fitzgerald, "Strained Si, SiGe, and Ge on-insulator: review of wafer bonding fabrication techniques," Solid State Electron., vol. 48, pp. 1297-1305, 2004.
-
(2004)
Solid State Electron.
, vol.48
, pp. 1297-1305
-
-
Taraschi, G.1
Pitera, A.J.2
Fitzgerald, E.A.3
-
5
-
-
0037566742
-
"Frontiers of silicon-on-insulator"
-
G. K. Celler and S. Cristoloveanu, "Frontiers of silicon-on-insulator," J. Appl. Phys., vol. 93, pp. 4955-4978, 2003.
-
(2003)
J. Appl. Phys.
, vol.93
, pp. 4955-4978
-
-
Celler, G.K.1
Cristoloveanu, S.2
-
6
-
-
84948471389
-
"Fabrication technologies for three-dimensional integrated circuits"
-
R. Reif, A. Fan, K.-N. Chen, and S. Das, "Fabrication technologies for three-dimensional integrated circuits," in Proc. Int. Symp. Quality Electronic Design, 2002, p. 33.
-
(2002)
Proc. Int. Symp. Quality Electronic Design
, pp. 33
-
-
Reif, R.1
Fan, A.2
Chen, K.-N.3
Das, S.4
-
7
-
-
7044231175
-
"Bonding silicon-on-insulator to glass wafers for integrated bio-electronic circuits"
-
H. S. Kim, R. H. Blick, D. M. Kim, and C. B. Eom, "Bonding silicon-on-insulator to glass wafers for integrated bio-electronic circuits," Appl. Phys. Lett., vol. 85, pp. 2370-2372, 2004.
-
(2004)
Appl. Phys. Lett.
, vol.85
, pp. 2370-2372
-
-
Kim, H.S.1
Blick, R.H.2
Kim, D.M.3
Eom, C.B.4
-
8
-
-
0034256695
-
"The dawn of organic electronics"
-
Aug.
-
S. Forrest, P. Burrows, and M. Thompson, "The dawn of organic electronics," IEEE Spectrum, vol. 37, no. 8, pp. 29-34, Aug. 2000.
-
(2000)
IEEE Spectrum
, vol.37
, Issue.8
, pp. 29-34
-
-
Forrest, S.1
Burrows, P.2
Thompson, M.3
-
9
-
-
0001972481
-
"Plastic electronics"
-
D. de Leeuw, "Plastic electronics," Phys. World, vol. 12, pp. 31-34, 1999.
-
(1999)
Phys. World
, vol.12
, pp. 31-34
-
-
de Leeuw, D.1
-
10
-
-
84954046093
-
"Ultra-high density board technology for sub-100 μm pitch nano-wafer level packaging"
-
V. Sundaram, F. Liu, A. O. Aggarwal, S. M. Hosseini, S. Mekala, G. E. White, R. R. Tummala, M. Swaminathan, W. Kim, R. Madhavan, G. Lo, M. K. Iyer, K. Vaidyanathan, E. H. Wong, R. Rajoo, and C. T. Chong, "Ultra-high density board technology for sub-100 μm pitch nano-wafer level packaging," in Proc. Electronics Packaging Technology Conf., 2003, p. 125.
-
(2003)
Proc. Electronics Packaging Technology Conf.
-
-
Sundaram, V.1
Liu, F.2
Aggarwal, A.O.3
Hosseini, S.M.4
Mekala, S.5
White, G.E.6
Tummala, R.R.7
Swaminathan, M.8
Kim, W.9
Madhavan, R.10
Lo, G.11
Iyer, M.K.12
Vaidyanathan, K.13
Wong, E.H.14
Rajoo, R.15
Chong, C.T.16
|