Systolic array architecture implementing Berlekamp-Massey-Sakata algorithm for decoding codes on a class of algebraic curves

IEEE Transactions on Information Theory

Volumn 51, Issue 11, 2005, Pages 3856-3871

  Matsui, Hajime ^a   Sakata, Shojiro ^b   Kurihara, Masazumi ^b   Mita, Seiichi ^a  

^a TOYOTA TECHNOLOGICAL INSTITUTE   (Japan)

^b UNIVERSITY OF ELECTRO COMMUNICATIONS   (Japan)

Author keywords

Berlekamp Massey Sakata (BMS) algorithm; Codes on algebraic curves; Gr bner basis; Parallel decoding; Systolic array

Indexed keywords

ALGEBRA; CODES (SYMBOLS); ERROR CORRECTION; FORMAL LOGIC; LINEAR EQUATIONS; PARALLEL ALGORITHMS; POLYNOMIALS; SYSTOLIC ARRAYS;

ALBEGRAIC CURVES; BERLEKAMP-MASSEY-SAKATA (BMS) ALGORITHM; GROBNER BASIS; PARALLEL DECODING; SYSTOLIC ARRAY ARCHITECTURE;

DECODING;

EID: 27744470380     PISSN: 00189448     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIT.2005.856950     Document Type: Article

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