-
1
-
-
0023704955
-
High performance multiqueue buffers for VLSI communication switches
-
Jun.
-
Y. Tamir and G. Frazier, "High performance multiqueue buffers for VLSI communication switches," Proc. 15th Anna. Symp. Comput. Arch., pp. 343-354, Jun. 1988.
-
(1988)
Proc. 15th Anna. Symp. Comput. Arch.
, pp. 343-354
-
-
Tamir, Y.1
Frazier, G.2
-
2
-
-
33751003925
-
MMRS and MMRRS packet scheduling algorithms for VOQ switches
-
Sep.
-
A. Baranowska and W. Kabaciński, "MMRS and MMRRS Packet Scheduling Algorithms for VOQ Switches," MMB PGTS 2004, pp. 359-368, Sep. 2004.
-
(2004)
MMB PGTS 2004
, pp. 359-368
-
-
Baranowska, A.1
Kabaciński, W.2
-
3
-
-
27644433677
-
The new packet scheduling algorithms for VOQ switches
-
Aug.
-
A. Baranowska and W. Kabaciński, "The New Packet Scheduling Algorithms for VOQ Switches," LNCS, vol. 3124, pp. 711-716, Aug. 2004.
-
(2004)
LNCS
, vol.3124
, pp. 711-716
-
-
Baranowska, A.1
Kabaciński, W.2
-
4
-
-
0027694638
-
High speed switch scheduling for local area networks
-
Nov.
-
T. Anderson and et al., "High Speed Switch Scheduling for Local Area Networks," ACM Trans. Comput. Syst., vol. 11, pp. 319-352, Nov. 1993.
-
(1993)
ACM Trans. Comput. Syst.
, vol.11
, pp. 319-352
-
-
Anderson, T.1
-
5
-
-
0027913135
-
Scheduling cells in an input-queued switch
-
N. McKeown, P. Varaiya, and J. Warland, "Scheduling cells in an Input-Queued Switch," IEEE Electron. Lett., pp. 2174-2175, 1993.
-
(1993)
IEEE Electron. Lett.
, pp. 2174-2175
-
-
McKeown, N.1
Varaiya, P.2
Warland, J.3
-
6
-
-
0032655137
-
The iSLIP scheduling algorithm for input-queued switches
-
Apr.
-
N. McKeown, "The iSLIP Scheduling Algorithm for Input-Queued Switches," IEEE/ACM Trans. Netw., vol. 7, pp. 188-200, Apr. 1999.
-
(1999)
IEEE/ACM Trans. Netw.
, vol.7
, pp. 188-200
-
-
McKeown, N.1
-
7
-
-
0242497616
-
An evolution to crossbar switches with virtual output queuing and buffered cross points
-
Sept.
-
K. Yoshigoe and J. Christensen, "An Evolution to Crossbar Switches with Virtual Output Queuing and Buffered Cross Points," IEEE Network, vol. 17, pp. 48-56, Sept. 2003.
-
(2003)
IEEE Network
, vol.17
, pp. 48-56
-
-
Yoshigoe, K.1
Christensen, J.2
-
8
-
-
0036171930
-
An implementable parallel scheduler for input-queued switches
-
P. Giaccone, D. Shah, and S. Prabhakar, "An Implementable Parallel Scheduler for Input-Queued Switches," IEEE Micro, vol. 22, no. 1, pp. 19-25, 2002.
-
(2002)
IEEE Micro
, vol.22
, Issue.1
, pp. 19-25
-
-
Giaccone, P.1
Shah, D.2
Prabhakar, S.3
-
9
-
-
0036170240
-
Efficent randomized algorithms for input-queued switch scheduling
-
Jan.
-
O. Shah, P. Giacconeand, and B. Prabhakar, "Efficent Randomized Algorithms for Input-Queued Switch Scheduling," Proc. HOTI IX, vol. 22, pp. 10-18, Jan. 2002.
-
(2002)
Proc. HOTI IX
, vol.22
, pp. 10-18
-
-
Shah, O.1
Giacconeand, P.2
Prabhakar, B.3
-
10
-
-
0038623639
-
Randomized scheduling algorithms for high-aggregate bandwidth switches
-
May
-
P. Giaccone, B. Prabhakar, and D. Shah, "Randomized Scheduling Algorithms for High-Aggregate Bandwidth Switches," IEEE J. Select. Areas Commun., vol. 21, pp. 546-559, May 2003.
-
(2003)
IEEE J. Select. Areas Commun.
, vol.21
, pp. 546-559
-
-
Giaccone, P.1
Prabhakar, B.2
Shah, D.3
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