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Volumn 22, Issue 1, 2002, Pages 19-25
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An implementable parallel scheduler for input-queued switches
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Author keywords
[No Author keywords available]
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Indexed keywords
INPUT-QUEUED SWITCHES;
ALGORITHMS;
BANDWIDTH;
BUFFER CIRCUITS;
COMPUTER SIMULATION;
INTERNET;
MATHEMATICAL MODELS;
MATRIX ALGEBRA;
PACKET NETWORKS;
QUEUEING NETWORKS;
SCHEDULING;
SEMICONDUCTOR SWITCHES;
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EID: 0036171930
PISSN: 02721732
EISSN: None
Source Type: Journal
DOI: 10.1109/40.988686 Document Type: Article |
Times cited : (23)
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References (8)
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