-
1
-
-
16244388907
-
10 GHz low phase noise folly integrated VCOs in 130 nm high resistivity CMOS/SOI for 40 Gbit/s datacom
-
October
-
D. Axelrad, E. de Foucauld, P.Vincent, M. Belleville, and F. Gaffiot, "10 GHz low phase noise folly integrated VCOs in 130 nm high resistivity CMOS/SOI for 40 Gbit/s datacom," 2004 IEEE International SOI Conference, pp. 174-176, October 2004.
-
(2004)
2004 IEEE International SOI Conference
, pp. 174-176
-
-
Axelrad, D.1
De Foucauld, E.2
Vincent, P.3
Belleville, M.4
Gaffiot, F.5
-
2
-
-
2442695469
-
A low-voltage 40-GHz complementary VCO with 15% frequency tuning range in SOI CMOS technology
-
May
-
N. Fong, J. Kim; J.-O. Plouchart, N. Zamdmer, Duixian Liu, L. Wagner, C. Plett, and G. Tarr, "A low-voltage 40-GHz complementary VCO with 15% frequency tuning range in SOI CMOS technology," IEEE J. of Solid-State Circuits., vol. 39, no. 5, pp. 841-846, May 2004.
-
(2004)
IEEE J. of Solid-state Circuits
, vol.39
, Issue.5
, pp. 841-846
-
-
Fong, N.1
Kim, J.2
Plouchart, J.-O.3
Zamdmer, N.4
Liu, D.5
Wagner, L.6
Plett, C.7
Tarr, G.8
-
3
-
-
27644465075
-
The control of jitter and wander in the optical transport network
-
October
-
"The control of jitter and wander in the optical transport network," ITU-T Recommendation G.8251, Draft revision 04.0, October 2001.
-
(2001)
ITU-T Recommendation G.8251, Draft Revision 04.0
-
-
-
5
-
-
0031700426
-
A 10 Gb/s Si-bipolar TX/RX chipset for computer data transmission
-
February
-
R.C. Walker, H. Kuo-Chiang, T.A. Knotts, and Y. Chu-Sun, "A 10 Gb/s Si-bipolar TX/RX chipset for computer data transmission," IEEE Int. 45th ISSCC Conf. Dig. of Tech. Papers, pp. 302-303, February 1998.
-
(1998)
IEEE Int. 45th ISSCC Conf. Dig. of Tech. Papers
, pp. 302-303
-
-
Walker, R.C.1
Kuo-Chiang, H.2
Knotts, T.A.3
Chu-Sun, Y.4
-
6
-
-
0346342381
-
A 40-Gb/s clock and data recovery circuit in 0.18-nm CMOS technology
-
December
-
J. Lee and B. Razavi, "A 40-Gb/s clock and data recovery circuit in 0.18-nm CMOS technology," IEEE J. Solid-State Circuits, vol. 38, no. 4, pp. 2181-2190, December 2003.
-
(2003)
IEEE J. Solid-state Circuits
, vol.38
, Issue.4
, pp. 2181-2190
-
-
Lee, J.1
Razavi, B.2
-
7
-
-
0026144142
-
Improved analysis of low-frequency noise in field effect MOS transistor
-
G. Ghibaudo, O. Roux-dit-Buisson, C. Nguyen-Duc, F. Balestra, and J. Brini, "Improved analysis of low-frequency noise in field effect MOS transistor," Phys. Stat. Solidi A, vol. 124, pp. 571-581, 1991.
-
(1991)
Phys. Stat. Solidi A
, vol.124
, pp. 571-581
-
-
Ghibaudo, G.1
Roux-Dit-Buisson, O.2
Nguyen-Duc, C.3
Balestra, F.4
Brini, J.5
-
8
-
-
0036504292
-
Tail current noise suppression in RF CMOS VCOs
-
March
-
P. Andreani and H. Sjöland, "Tail current noise suppression in RF CMOS VCOs," IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 342-348, March 2002.
-
(2002)
IEEE J. Solid-state Circuits
, vol.37
, Issue.3
, pp. 342-348
-
-
Andreani, P.1
Sjöland, H.2
-
9
-
-
0030401390
-
An efficient design tool for transmission line on SIMOX substrates
-
October
-
J.-P. Raskin, I. Huynen, R. Gillon, D. Vanhoenacker, and J.P. Colinge, "An efficient design tool for transmission line on SIMOX substrates," 1996 IEEE International SOI Conference, pp. 28-29, October 1996.
-
(1996)
1996 IEEE International SOI Conference
, pp. 28-29
-
-
Raskin, J.-P.1
Huynen, I.2
Gillon, R.3
Vanhoenacker, D.4
Colinge, J.P.5
|