Combining ordered best-first search with branch and bound for exact BDD minimization

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 24, Issue 10, 2005, Pages 1515-1529

  Ebendt, Rüdiger ^a,b   Günther, Wolfgang ^a,c   Drechsler, Rolf ^a,b  

^a IEEE   (Germany)

^b UNIVERSITY OF BREMEN   (Germany)

^c INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

A* algorithm; Best first search; Binary decision diagram (BDD); Branch and bound (B B); Logic synthesis; Pass transistor logic

Indexed keywords

A; ALGORITHM; BEST-FIRST SEARCH; BINARY DECISION DIAGRAMS (BDD); BRANCH AND BOUND (B&B); LOGIC SYNTHESIS; PASS TRANSISTOR LOGIC;

ALGORITHMS; BOOLEAN FUNCTIONS; DATA STRUCTURES; FORMAL LOGIC;

DECISION MAKING;

EID: 27144456162     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.852053     Document Type: Article

References (25)

1. R. E. Bryant, "Graph-based algorithms for Boolean function manipulation," IEEE Trans. Comput., vol. 35, no. 8, pp. 677-691, Aug. 1986.
2. P. Buch, A. Narayan, A. Newton, and A. Sangiovanni-Vincentelli, "Logic synthesis for large pass transistor circuits," in Int. Conf. Computer-Aided Design (ICCAD), San Jose, CA, Aug. 1997, pp. 663-670.
3. F. Ferrandi, A. Macii, E. Macii, M. Poncino, R. Scarsi, and F. Somenzi, "Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits," in Proc. Int. Conf. Computer-Aided Design (ICCAD), San Jose, CA, 1998, pp. 235-241.
4. A. Mukherjee, R. Sudhakar, M. Marek-Sadowska, and S. Long, "Wave steering in YADDs: A novel, non-iterative synthesis and layout technique," in Design Automation Conf., New Orleans, LA, 1999, pp. 466-471.
5. L. Macchiarulo, L. Benini, and E. Macii, "On-the-fly layout generation for PTL macrocells," in Design, Automation and Test Eur., Munich, Germany, 2001, pp. 546-551.
6. C. Yang and M. Ciesielski, "BDS: A BDD-based logic optimization system," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 21, no. 7, pp. 866-876, Jul. 2002.
7. B. Bollig and I. Wegener, "Improving the variable ordering of OBDDs in NP-complete," IEEE Trans. Comput., vol. 45, no. 9, pp. 993-1002, Sep. 1996.
8. H. Fujii, G. Ootomo, and C. Hori, "Interleaving based variable ordering methods for ordered binary decision diagrams," in Int. Conf. Computer-Aided Design (ICCAD), Santa Clara, CA, 1993, pp. 38-41.
9. R. Rudell, "Dynamic variable ordering for ordered binary decision diagrams," in Int. Conf. Computer-Aided Design (ICCAD), Santa Clara, CA, 1993, pp. 42-47.
10. N. Ishiura, H. Sawada, and S. Yajima, "Minimization of binary decision diagrams based on exchange of variables," in Int. Conf. Computer-Aided Design (ICCAD), Santa Clara, CA, 1991, pp. 472-475.
11. S. Friedman and K. Supowit, "Finding the optimal variable ordering for binary decision diagrams," in Design Automation Conf, Miami Beach, FL, 1987, pp. 348-356.
12. P. Hart, N. Nilsson, and B. Raphael, "A formal basis for the heuristic determination of minimum cost paths," IEEE Trans. Syst. Sci. Cybern., vol. SSC-4, no. 2, pp. 100-107, Jul. 1968.
13. J. Pearl, Heuristics: Intelligent Search Strategies for Computer Problem Solving. Reading, MA: Addison-Wesley, 1984.
14. K. Brace, R. Rudell, and R. Bryant, "Efficient implementation of a BDD package," in Design Automation Conf, Orlando, FL, 1990, pp. 40-45.
15. R. Dechter and J. Pearl, "Generalized best-first search strategies and the optimality of A*," J. Assoc. Comput. Mach., vol. 34, no. 1, pp. 1-38, 1987.
16. A. Martelli, "On the complexity of admissable search algorithms," Artif. Intell., vol. 8, no. 1, pp. 1-13, 1977.
17. L. Mérõ, "A heuristic search algorithm with modifiable estimate," Artif. Intell., vol. 23, no. 1, pp. 13-27, 1984.
18. S.-W. Jeong, T.-S. Kim, and F. Somenzi, "An efficient method for optimal BDD ordering computation," in Int. Conf. VLSI and CAD (ICVC), Taejon, Korea, 1993, pp. 252-256.
19. R. Drechsler, N. Drechsler, and W. Gũnther, "Fast exact minimization of BDDs," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 19, no. 3, pp. 384-389, Mar. 2000.
20. R. Ebendt, W. Günther, and R. Drechsler, "An improved branch and bound algorithm for exact BDD minimization," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 22, no. 12, pp. 1657-1663, Dec. 2003.
21. N. Nilsson, Principles of Artificial Intelligence. Palo Alto, CA: Tioga, 1980.
22. V. Kumar, K. Ramesh, and V. N. Rao, "Parallel best-first search of state-space graphs: A summary of results," in Nat. Conf. Artificial Intelligence, Saint Paul, MN, 1988, pp. 122-127.
23. A. Aho, J. Hopcroft, and J. D. Ullman, The Design and Analysis of Computer Algorithms. Reading, MA: Addison-Wesley, 1974.
24. F. Somenzi, CU Decision Diagram Package Release 2.3.1. Boulder: Univ. Colorado, 2002.
25. Collaborative Benchmarking Lab., in "1993 LGSynth Benchmarks," North Carolina State Univ., Dept. Comput. Sci., Raleigh, NC, 1993.