An Improved Branch and Bound Algorithm for Exact BDD Minimization

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 22, Issue 12, 2003, Pages 1657-1663

  Ebendt, Rüdiger ^a   Günther, Wolfgang ^b   Drechsler, Rolf ^c  

^a University of Koblenz Landau   (Germany)

^b INFINEON TECHNOLOGIES AG   (Germany)

^c UNIVERSITY OF BREMEN   (Germany)

Author keywords

Binary decision diagram (BDD); Exact minimization; Logic synthesis; Pass transistor logic

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; COMPUTATIONAL COMPLEXITY; COMPUTER AIDED LOGIC DESIGN; DECISION THEORY; ELECTRIC NETWORK SYNTHESIS; GRAPHIC METHODS; OPTIMIZATION; VLSI CIRCUITS;

BINARY DECISION DIAGRAMS (BDD); LOGIC SYNTHESIS;

DATA STRUCTURES;

EID: 9144250993     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2003.819427     Document Type: Article

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