Junction-isolated electrical test structures for critical dimension calibration standards

IEEE Transactions on Semiconductor Manufacturing

Volumn 17, Issue 2, 2004, Pages 79-83

  Allen, Richard A ^a   Cresswell, Michael W ^a   Linholm, Loren W ^a,b  

^a NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

^b NONE

Author keywords

Anisotropie etch; Critical dimension (CD); Electrical critical dimension (BCD); Electrical test structure; Linewidth; Metrology

Indexed keywords

ANISOTROPY; ETCHING; HIGH RESOLUTION ELECTRON MICROSCOPY; MICROPROCESSOR CHIPS; SCANNING ELECTRON MICROSCOPY; SILICON WAFERS; SINGLE CRYSTALS; TRANSMISSION ELECTRON MICROSCOPY;

ANISOTROPIC ETCHING; CRITICAL DIMENSION (CD); ELECTRICAL CRITICAL DIMENSION (ECD); ELECTRICAL TEST STRUCTURE; LINEWIDTH;

SEMICONDUCTOR JUNCTIONS;

EID: 2642578232     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSM.2004.826928     Document Type: Conference Paper

References (7)

1. Handbook of Silicon Semiconductor Metrology, A. Diebold, Ed., Marcel Dekker, New York, 2001, pp. 377-410.
2. R. A. Alien, T. J. Headley, S. C. Everist, R. N. Ghoshtagore, M. W. Cresswell, and L. W. Linholm, "High resolution transmission electron microscopy calibration of critical dimension reference materials," IEEE Trans. Semiconduct. Manufact., vol. 14, pp. 26-31, Feb. 2001.
3. R. A. Allen, B. A. am Ende, M. W. Cresswell, C. E. Murabito, T. J. Headley, W. F. Guthrie, L. W. Linholm, C. E. Ellenwood, and E. H. Bogardus, "Test structures for referencing electrical linewidth measurements to silicon lattice parameters using HRTEM," IEEE Trans. Semiconduct. Manufact., vol. 16, pp. 239-248, May 2003.
4. R. A. Alien, R. N. Ghoshtagore, M. W. Cresswell, L. W. Linholm, and J. J. Sniegowski, "Comparison of properties of electrical test structures patterned in BESOI and SIMOX films for reference-material applications," in Proc. SPIE, Integrated Circuit Metrology, Inspection, and Process Control XII, vol. 3332, Feb. 23-27, 1998, pp. 124-131.
5. M. W. Cresswell, J. J. Sniegowski, R. N. Ghoshtagore, R. A. Allen, W. F. Guthrie, A. W. Gurnell, L. W. Linholm, R. G. Dixson, and E. C. Teague, "Recent developments in electrical linewidth and overlay metrology for integrated circuit fabrication processes," Jpn. J. Appl. Phys., vol. 35, pp. 6597-6609, 1996.
6. M. W. Cresswell, J. E. Bonevich, T. J. Headley, R. A. Allen, L. A. Giannuzzi, S. C. Everist, R. N. Ghoshtagore, and P. J. Shea, "Comparison of electrical CD measurements and cross-section lattice-plane counts of sub-micrometer features replicated in (100) silicon-on-insulator material," in Proc. SPIE, vol. 3998, 2000, pp. 74-82.
7. R. A. Allen, M. W. Cresswell, and L. M. Buck, "A new test structure for the electrical measurement of the widths of short features with arbitrarily wide voltage tap," IEEE Electron Device Lett., vol. 13, pp. 322-324, June 1992.