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Volumn E88-C, Issue 6, 2005, Pages 1122-1126

The influence of the stacked and double material gate structures on the short channel effects in SOI MOSFETS

Author keywords

DIBL; Dual metal gate; MOSFET; Short channel effects; Stacked gate

Indexed keywords

COMPUTER SIMULATION; ELECTRIC FIELD EFFECTS; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE;

EID: 25844530851     PISSN: 09168524     EISSN: 17451353     Source Type: Journal    
DOI: 10.1093/ietele/e88-c.6.1122     Document Type: Article
Times cited : (8)

References (7)
  • 1
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    • Experimental 0.25 μm gate fully depleted CMOS/SIMOX process using a new two-step LOCOS isolation technique
    • T. Ohno, Y. Kado, M. Harada, and T. Tsuchiya, "Experimental 0.25 μm gate fully depleted CMOS/SIMOX process using a new two-step LOCOS isolation technique," IEEE Trans. Electron Devices, vol.42, no.8, pp.1481-1486, 1995.
    • (1995) IEEE Trans. Electron Devices , vol.42 , Issue.8 , pp. 1481-1486
    • Ohno, T.1    Kado, Y.2    Harada, M.3    Tsuchiya, T.4
  • 2
    • 0043231377 scopus 로고    scopus 로고
    • Modeling and simulation of asymmetric gate stack (ASYMGAS)-MOSFET
    • M. Saxena, S. Haldar, M. Gupta, and R.S. Gupta, "Modeling and simulation of asymmetric gate stack (ASYMGAS)-MOSFET," Solid-State Electron., vol.47, no.11, pp.2131-2134, 2003.
    • (2003) Solid-state Electron. , vol.47 , Issue.11 , pp. 2131-2134
    • Saxena, M.1    Haldar, S.2    Gupta, M.3    Gupta, R.S.4
  • 3
    • 1942423745 scopus 로고    scopus 로고
    • Two-dimensional analysis modeling of fully depleted DMG SOI MOSFET and evidence for diminished SCEs
    • M.J. Kumar and A. Chaudhry, "Two-dimensional analysis modeling of fully depleted DMG SOI MOSFET and evidence for diminished SCEs," IEEE Trans. Electron Devices, vol.51, no.4, pp.569-574, 2004.
    • (2004) IEEE Trans. Electron Devices , vol.51 , Issue.4 , pp. 569-574
    • Kumar, M.J.1    Chaudhry, A.2
  • 4
    • 0032670723 scopus 로고    scopus 로고
    • Dual material gate (DMG) field effect transistor
    • W. Long, H. Ou, J. Kuo, and K.K. Chin, "Dual material gate (DMG) field effect transistor," IEEE Trans. Electron Devices, vol.46, no.5, pp.865-870, 1999.
    • (1999) IEEE Trans. Electron Devices , vol.46 , Issue.5 , pp. 865-870
    • Long, W.1    Ou, H.2    Kuo, J.3    Chin, K.K.4
  • 5
    • 2342588638 scopus 로고    scopus 로고
    • Exploring the novel characteristics of fully depleted dual-material gate (DMG) SOI MOSFET using two-dimensional numerical simulation studies
    • A. Chaudhry and M.J. Kumar, "Exploring the novel characteristics of fully depleted dual-material gate (DMG) SOI MOSFET using two-dimensional numerical simulation studies," Proc. VLSID, pp.662-665, 2004.
    • (2004) Proc. VLSID , pp. 662-665
    • Chaudhry, A.1    Kumar, M.J.2
  • 7
    • 0024612456 scopus 로고
    • Short channel effect in fully depleted SOI MOSFETs
    • K.K. Young, "Short channel effect in fully depleted SOI MOSFETs," IEEE Trans. Electron Devices, vol.36, no.2, pp.399-402, 1989.
    • (1989) IEEE Trans. Electron Devices , vol.36 , Issue.2 , pp. 399-402
    • Young, K.K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.