Simulation of parasitic interconnect capacitance for present and future ICs

Lecture Notes in Computer Science

Volumn 3514, Issue I, 2005, Pages 607-614

  Tosik, Grzegorz ^a   Lisik, Zbigniew ^a   Langer, Malgorzata ^a   Wozny, Janusz ^a  

^a LODZ UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; ELECTRIC WIRING; MATHEMATICAL MODELS; MAXWELL EQUATIONS; PROBLEM SOLVING;

INTERCONNECT LINE; REAL CAPACITANCE; EMPIRICAL APPROACH; INTERCONNECT CAPACITANCE; INTERCONNECT LINES; PARASITIC COMPONENTS; WIRING CAPACITANCE; WIRING REQUIREMENTS;

INTEGRATED CIRCUITS; INTEGRATED CIRCUIT INTERCONNECTS;

EID: 25144459947     PISSN: 03029743     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1007/11428831_75     Document Type: Conference Paper

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