Surface mobility in silicon at large operating temperature

International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Volumn 2002-January, Issue , 2002, Pages 15-20

  Reggiani, S ^a   Valdinoci, A ^a   Colalongo, L ^a   Rudan, M ^a   Baccarani, G ^a   Stricker, A ^b   Illien, F ^b   Felber, N ^b   Fichtner, W ^b   Mettler, S ^c   Lindenkreuz, S ^c   Zullino, L ^d  

^a UNIVERSITY OF BOLOGNA   (Italy)

^b ETH ZURICH   (Switzerland)

^c ROBERT BOSCH GMBH   (Germany)

^d STMICROELECTRONICS   (Italy)

Author keywords

Electric breakdown; Impurities; Lattices; Manufacturing; Microelectronics; MOSFET circuits; Silicon; Temperature control; Temperature distribution; Testing

Indexed keywords

CARRIER CONCENTRATION; CARRIER MOBILITY; CRYSTAL LATTICES; ELECTRIC BREAKDOWN; HALL MOBILITY; IMPURITIES; MANUFACTURE; MICROELECTRONICS; SEMICONDUCTOR DEVICES; SILICON; TEMPERATURE; TEMPERATURE CONTROL; TEMPERATURE DISTRIBUTION; TESTING;

EXPERIMENTAL INVESTIGATIONS; IMPURITY CONCENTRATION; INDUSTRIAL ENVIRONMENTS; LATTICE TEMPERATURES; MOSFET CIRCUITS; OPERATING TEMPERATURE; SILICON INVERSION LAYERS; ST MICROELECTRONICS;

MOSFET DEVICES;

EID: 25144444725     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SISPAD.2002.1034506     Document Type: Conference Paper

References (9)

1. S. A. Schwarz and S. E. Russek, "Semi-empirical equations for electron velocity in silicon - Part II: MOS inversion layer", IEEE Trans. on Electron Devices, vol. ED-30, no. 12, pp. 1634-1639, 1983.
2. C. Lombardi, S. Manzini, A. Saporito and M. Vanzi, "A physically-based mobility model for numerical simulation of nonplanar devices", IEEE Trans. on Computer-Aided Design, vol. 7, no. 11, pp. 1164-1171, 1988.
3. M. N. Darwish, J. L. Lentz, M. R. Pinto, P. M. Zeitzoff, T. J. Krutsik and H. H. Vuong, "An improved electron and hole mobility model for general purpose device simulation", IEEE Trans. on Electron Devices, vol. ED-44, no. 9, pp. 1529-1538, 1997.
4. S. Reggiani, M. Valdinoci, L. Colalongo, M. Rudan, G. Baccarani, A. Stricker, F. Illien, N. Felber, W. Fichtner, and L. Zullino, "Electron and Hole Mobility in Silicon at Large Operating Temperatures. Part I - Bulk mobility.," IEEE Trans. on ED, vol. 49, no. 3, pp. 490-499, March 2002.
5. S. Takagi, A. Toriumi, M. Iwase, and H. Tango, "On the universality of inversion layer mobility in Si MOSFET's: part I - effects of substrate impurity concentration," IEEE Trans. Electron Devices, vol.ED-41, no. 12, pp. 2357-2362, 1994.
6. R. A. Logan and A. J. Peters, "Impurity effects upon mobility in silicon," Journal of applied physics, vol. 31, no. 1, pp. 122-124, 1960.
7. E. De Castro, Fondamenti di Elettronica - Fisica elettronica ed elementi di teoria dei dispositivi, UTET, Torino (Italy), 1975.
8. F. J. Morin and J. P. Maita, "Electrical properties of silicon containing arsenic and boron," Physical review, vol. 96, no. 1, pp. 28-35, 1954.
9. C. Jungemann, D. Dudenbostel and B Meinerzhagen, "Hall factors of Si NMOS inversion layers for MAGFET modeling", IEEE Electron Device Letters, vol. EDL-46, no. 8, pp. 1803-1804, 1999.