A programmable DSP architecture for wireless communication systems

Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors

Volumn , Issue , 2005, Pages 231-238

  Kamalizad, Amir ^a   Tabrizi, Nozar ^b   Bagherzadeh, Nader ^a   Hatanaka, Akira ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b KETTERING UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BASEBAND TRANSCEIVERS; COMMUNICATION STANDARDS; PARALLELISM; POWER OPTIMIZATION;

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CONSTRAINT THEORY; DECODING; STANDARDS; TRANSCEIVERS; WIRELESS TELECOMMUNICATION SYSTEMS;

COMPUTER ARCHITECTURE;

EID: 24944456890     PISSN: 10636862     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASAP.2005.9     Document Type: Conference Paper

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