Macro-cell placement for analog physical designs using a hybrid genetic algorithm with simulated annealing

Integrated Computer-Aided Engineering

Volumn 12, Issue 4, 2005, Pages 379-396

  Zhang, Lihong ^a,d   Raut, Rabin ^a   Jiang, Yingtao ^b   Kleine, Ulrich ^c   Kim, Yoohwan ^b  

^a Gina Cody School of Engineering and Computer Science   (Canada)

^b University of Nevada Las Vegas   (United States)

^c OTTO VON GUERICKE UNIVERSITY   (Germany)

^d DALHOUSIE UNIVERSITY   (Canada)

Author keywords

Analog integrated circuits; Genetic algorithm; Physical design; Placement; Simulated annealing

Indexed keywords

COMPUTER AIDED DESIGN; GENETIC ALGORITHMS; INTEGRATED CIRCUIT LAYOUT; INTELLECTUAL PROPERTY; MICROPROCESSOR CHIPS; OPTIMIZATION; PRODUCTIVITY; SIMULATED ANNEALING;

ANALOG INTEGRATED CIRCUITS; CHIP FUNCTIONALITY; MACRO-CELL PLACEMENT; PHYSICAL DESIGN; PLACEMENT;

INTEGRATED CIRCUITS;

EID: 24944444455     PISSN: 10692509     EISSN: None     Source Type: Journal    
DOI: 10.3233/ica-2005-12406     Document Type: Article

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