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Volumn 2, Issue , 2005, Pages 1114-1118

Electrical performance and reliability of fine-pitch Cu bumpless interconnect

Author keywords

[No Author keywords available]

Indexed keywords

BONDING; COPPER; ELECTRIC CONTACTS; ELECTRIC INSULATION; ELECTRIC RESISTANCE; FLASH MEMORY; MICROPROCESSOR CHIPS; POLYIMIDES; PROBLEM SOLVING; RELIABILITY; STRAIN;

EID: 24644443831     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (9)

References (11)
  • 1
    • 24644467887 scopus 로고    scopus 로고
    • PWB-compatible integral passive advances at PRC
    • Tokyo, Japan
    • rd IEMT/IMC symposium, Tokyo, Japan, 1999, pp. 217-218.
    • (1999) rd IEMT/IMC Symposium , pp. 217-218
    • Tummala, R.R.1
  • 2
    • 24644523804 scopus 로고    scopus 로고
    • Substrate based semiconductor packaging; Market growth and technology trends
    • rd IEMT/IMC symposium, 1999, pp. 106-109.
    • (1999) rd IEMT/IMC Symposium , pp. 106-109
    • Bauer, C.E.1
  • 3
    • 0034478736 scopus 로고    scopus 로고
    • Feasibility of surface activated bonding for ultrafine pitch interconnection
    • ECTC
    • th IEEE, ECTC, 2000, pp. 702-705.
    • (2000) th IEEE , pp. 702-705
    • Suga, T.1
  • 4
    • 0034835192 scopus 로고    scopus 로고
    • Bump-less interconnect for next generation system packaging
    • ECTC
    • st IEEE, ECTC, 2001, pp. 1003-1008.
    • (2001) st IEEE , pp. 1003-1008
    • Suga, T.1    Otsuka, K.2
  • 5
    • 0000944433 scopus 로고    scopus 로고
    • Surface activated bonding of silicon wafers at room temperature
    • H. Takagi, K. Kikuchi, et al., Surface activated bonding of silicon wafers at room temperature, appl. Phys. Lett., 68 (1996) pp. 2222-2224.
    • (1996) Appl. Phys. Lett. , vol.68 , pp. 2222-2224
    • Takagi, H.1    Kikuchi, K.2
  • 11
    • 0011960847 scopus 로고    scopus 로고
    • Advanced packaging technologies on 3D stacked LSI utilizing the micro interconnections and the layered microthin encapsulation
    • EMAP
    • Y. Tomita, M. Tago et al., Advanced packaging technologies on 3D stacked LSI utilizing the micro interconnections and the layered microthin encapsulation, Proc. IEEE, EMAP, 2001, pp. 107-114.
    • (2001) Proc. IEEE , pp. 107-114
    • Tomita, Y.1    Tago, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.