A 300MHz 25μA/Mb leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Yamaoka, Masanao ^a   Shinozaki, Yoshihiro ^b   Maeda, Noriaki ^c   Shimazaki, Yasuhisa ^c   Kato, Kei ^d   Shimada, Shigeru ^d   Yanagisawa, Kazumasa ^d   Osada, Kenichi ^a  

^a Hitachi ^*  (Japan)

^b HITACHI LTD   (Japan)

^c SuperH (Japan)   (Japan)

^d RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROCESSORS; MOBILE PHONES; POWER CONSUMPTION;

AMPLIFIERS (ELECTRONIC); ARRAYS; DIODES; ELECTRIC CLOCKS; FABRICATION; LEAKAGE CURRENTS; LSI CIRCUITS; MICROPROCESSOR CHIPS; MOSFET DEVICES; STATIC RANDOM ACCESS STORAGE;

MOBILE TELECOMMUNICATION SYSTEMS;

EID: 2442719367     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. T. Kamei et al., "A Resume-Standby Application Processor for 3G Cellular Phones," ISSCC Dig. Tech. Papers, paper 18.4, Feb. 2004.
2. K. Osada et al., "Universal-Vdd 0.65-2.0V 32kB Cache using Voltage-Adapted Timing-Generation Scheme and a Lithographical-Symmetric Cell," ISSCC Dig. Tech. Papers, pp. 168-169, Feb. 2001.
3. K. Osada et al., "16.7fA/cell Tunnel-Leakage-Suppressed 16Mb SRAM for Handling Cosmic-Ray-Induced Multi-Errors," ISSCC Dig. Tech. Papers, pp. 302-303, Feb. 2003.
4. A. J. Bhavnagarwala et al., "A Pico-Joule Class, IGHz, 32 kB × 64b DSP SRAM with Self Reverse Bias," Symp. on VLSI Circuits Dig., pp. 251-252, June 2003.
5. K. Nii et al., "A 90nm Low Power 32K-Byte Embedded SRAM with Gate Leakage Suppression Circuit for Mobile Applications," Symp. on VLSI Circuits Dig., pp. 247-250, June 2003.