A 108Gb/s 4:1 multiplexer in 0.13μm SiGe-Bipolar technology

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Meghelli, Mounir ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK DISTRIBUTION; DUTY CYCLE; EMITTER COUPLED LOGIC; TREE ARCHITECTURE;

CONSTRAINT THEORY; DATA TRANSFER; ELECTRIC IMPEDANCE; GATES (TRANSISTOR); JITTER; POWER AMPLIFIERS; RESISTORS; SEMICONDUCTING SILICON COMPOUNDS; TREES (MATHEMATICS);

MULTIPLEXING;

EID: 2442646311     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. M. Meghelli et al., "A 0.18μm SiGe BiCMOS Receiver and Transmitter Chipset for SONET OC-768 Transmission Systems", ISSCC Dig. Tech. Papers, pp. 232-233, Feb. 2003.
2. A. Ong et al., "A 40-43Gb/s clock and data recovery IC with integrated SFI-5 1:16 demultiplexer in SiGe technology", ISSCC Dig. Tech. Papers, pp. 234-235, Feb. 2003.
3. T SiGe HBTs - expanding the horizons of SiGe BiCMOS", ISSCC Dig. Tech. Papers, pp. 180-181, Feb. 2002.
4. B. Jagannathan et al., "3.9 ps SiGe HBT ECL Ring Oscillator and Transistor Design for Minimum Gate Delay", IEEE Electron Device Letters, vol. 24, pp. 324-326, May 2003.
5. A. Rylyakov and T. Zwick, "96GHz Static Frequency Divider in SiGe bipolar technology", GaAs IC symposium, 2003, to be published.
6. Y Nakasha et al., "A 43Gb/s Full-Rate-Clock 4:1 Multiplexer in InP-based HEMT Technology", ISSCC Dig. Tech. Papers, pp. 190-191, Feb. 2002.