Register binding and port assignment for multiplexer optimization

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2004, Pages 68-73

  Chen, Deming ^a   Cong, Jason ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA FLOW GRAPHS (DFG); MULTIPLEXER OPTIMIZATION; PORT ASSIGNMENT; REGISTER TRANSFER LEVELS (RTL);

ALGORITHMS; BANDWIDTH; COMPUTER SIMULATION; DATA FLOW ANALYSIS; FIELD PROGRAMMABLE GATE ARRAYS; MATHEMATICAL MODELS; PARAMETER ESTIMATION; RESOURCE ALLOCATION; TRANSISTORS; VLSI CIRCUITS;

MULTIPLEXING;

EID: 2442597216     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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