A performance and manufacturability evaluation of bump chip carrier packages

IEEE Transactions on Advanced Packaging

Volumn 27, Issue 1, 2004, Pages 151-157

  Mercado, Lei L ^a   Sarihan, Vijay ^a   Fiorenzo, Russell ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Bump chip carrier (BCC) packages; Chip scale packages (CSP); Low I O count; Manufacturing; Mold compound; Package reliability; Simulation; Solder reliability; Thermal cyclic; Warpage

Indexed keywords

CARRIER CONCENTRATION; COMPUTER SIMULATION; FINITE ELEMENT METHOD; INTEGRATED CIRCUIT MANUFACTURE; RELIABILITY; SOLDERING ALLOYS; THERMAL CYCLING; THERMOMECHANICAL TREATMENT; THICKNESS MEASUREMENT;

BUMP CHIP CARRIER PACKAGES; HEAT SLUGS; MAUNFACTURABILITY EVALUATION; MOLD COMPOUNDS; SOLDER RELIABILITY; WARPAGE;

CHIP SCALE PACKAGES;

EID: 2442593892     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/TADVP.2004.824940     Document Type: Article

References (8)

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