Impact of solder pad size on solder joint reliability in flip chip PBGA packages

IEEE Transactions on Advanced Packaging

Volumn 23, Issue 3, 2000, Pages 415-420

  Mercado, Lei L ^a   Sarihan, Vijay ^a   Guo, Yifan ^a   Mawer, Andrew ^b  

^a MOTOROLA INC   (United States)

^b MOTOROLA INC   (United States)

Author keywords

Electronic packaging; Flip chip; PBGA; Reliability; Solder joint; Solder pad size

Indexed keywords

CORRELATION METHODS; FINITE ELEMENT METHOD; FLIP CHIP DEVICES; INTERFEROMETRY; OPTIMIZATION; RELIABILITY; SOLDERED JOINTS; SOLDERING ALLOYS; STRESS ANALYSIS; SUBSTRATES; THERMAL CYCLING;

MOIRE INTERFEROMETRY; PLASTIC BALL GRID ARRAY; SOLDER PAD SIZE;

ELECTRONICS PACKAGING;

EID: 0034238611     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/6040.861555     Document Type: Article

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