A high-performance 64-bit adder implemented in output prediction logic

Proceedings - 2001 Conference on Advanced Research in VLSI, ARVLSI 2001

Volumn , Issue , 2001, Pages 213-222

  Sun, Sheng ^a   McMurchie, L ^a   Sechen, C ^a  

^a UNIVERSITY OF WASHINGTON   (United States)

Author keywords

Adders; Circuit noise; Circuit synthesis; Clocks; CMOS logic circuits; Logic circuits; Pulse inverters; Sun; Switches; Switching circuits

Indexed keywords

ADDERS; CHOPPERS (CIRCUITS); CLOCKS; LOGIC SYNTHESIS; SUN; SWITCHES; SWITCHING CIRCUITS; VLSI CIRCUITS;

CIRCUIT NOISE; CIRCUIT SYNTHESIS; CMOS LOGIC CIRCUITS; DATAPATH CIRCUITS; LOGIC FAMILIES; OUTPUT PREDICTION LOGIC; PULSE INVERTERS; RANDOM LOGIC;

LOGIC CIRCUITS;

EID: 2442559705     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ARVLSI.2001.915562     Document Type: Conference Paper

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