A novel simple CBCM method free from charge injection-induced errors

IEEE Electron Device Letters

Volumn 25, Issue 5, 2004, Pages 262-264

  Chang, Yao Wen ^a   Chang, Hsing Wen ^a   Hsieh, Chung Hsuan ^a   Lai, Han Chao ^a   Lu, Tao Cheng ^a   Ting, Wenchi ^a   Ku, Joseph ^a   Lu, Chih Yuan ^a  

^a MACRONIX INTERNATIONAL CO LTD   (Taiwan)

Author keywords

Capacitance measurement; Charge injection; Charge injection induced error free (CIEF); Charge based capacitance measurement method (CBCM); Interconnect capacitance

Indexed keywords

COMPUTER SIMULATION; ERROR CORRECTION; MOS CAPACITORS; MOSFET DEVICES;

CHARGE INJECTION; INTERCONNECT CAPACITANCE;

CAPACITANCE MEASUREMENT;

EID: 2442430553     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2004.826524     Document Type: Letter

References (6)

1. J. C. Chen, B. W. McGaughy, D. Sylvester, and C. Hu, "An on-chip, attofarad interconnect charge-based capacitance measurement (CBCM) technique," in IEDM Tech. Dig., 1996, pp. 3.4.1-3.4.4.
2. X. W. Lin and D. Pramanik, "Future interconnect technologies and copper metallization," Solid State Technol., pp. 63-79, Oct. 1998.
3. D. Sylvester and C. Hu, "Analytical modeling and characterization of deep-submicrometer interconnect," Proc. IEEE, vol. 89, pp. 634-664, May 2001.
4. B. Froment, F. Paillardet, M. Bely, J. Cluzel, E. Granger, M. Haond, and L. Dugoujon, "Ultra low capacitance measurements in multilevel metallization CMOS by using a built-in electron-meter," in IEDM Tech. Dig., 1999, pp. 37.2.1-37.2.4.
5. A. Brambilla, P. Maffezzoni, L. Bortesi, and L. Vendrame, "Measurements and extractions of parasitic capacitances in ULSI layouts," IEEE Trans. Electron Devices, vol. 50, pp. 2236-2247, Nov. 2003.
6. B. J. Sheu and C. Hu, "Switch-induced error voltage on a switched capacitor," IEEE J. Solid-State Circuits, vol. SC-19, pp. 519-525, Aug. 1984.