Systolic product-sum circuit for GF((22)m) using neuron MOSFETs

Integration, the VLSI Journal

Volumn 39, Issue 1, 2005, Pages 29-47

  Abu Khader, Nabil ^a   Siy, Pepe ^a  

^a Wayne State University   (United States)

Author keywords

Composite and binary galois fields; MVL; Neuron MOSFET; Quaternary logic

Indexed keywords

ADDERS; COMPUTER SIMULATION; ELECTRIC POTENTIAL; ELECTRON MULTIPLIERS; FLIP FLOP CIRCUITS; MOSFET DEVICES; PRODUCT DESIGN; TRANSISTORS;

COMPOSITE AND BINARY GALOIS FIELDS; MVL; NEURON MOSFET; QUATERNARY LOGIC;

COMPUTER CIRCUITS;

EID: 24344496924     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.vlsi.2004.12.001     Document Type: Article

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