메뉴 건너뛰기




Volumn 2, Issue , 2002, Pages II663-II666

ALU design using reconfigurable CMOS logic

Author keywords

ALU; Full adder; MIFG MOSFET; Reconfigurable logic; Threshold logic gate

Indexed keywords

ADDERS; CMOS INTEGRATED CIRCUITS; DIGITAL ARITHMETIC; GATES (TRANSISTOR); LOGIC GATES;

EID: 0036973829     PISSN: None     EISSN: None     Source Type: Journal    
DOI: 10.1109/MWSCAS.2002.1186949     Document Type: Article
Times cited : (10)

References (7)
  • 1
    • 27944492851 scopus 로고
    • A functional MOS transistor featuring gate-level weighted sum and threshold operations
    • June
    • T. Shibata and T. Ohmi, “A functional MOS transistor featuring gate-level weighted sum and threshold operations,” IEEE transactions on Electron Devices, vol. 39, pp. 1444-1455, June 1992.
    • (1992) IEEE Transactions on Electron Devices , vol.39 , pp. 1444-1455
    • Shibata, T.1    Ohmi, T.2
  • 2
    • 84954088099 scopus 로고
    • An intelligent MOS. transistor featuring gate-level weighted sum and threshold operations
    • T. Shibata and T. Ohmi, “An intelligent MOS. transistor featuring gate-level weighted sum and threshold operations,” IEDM Tech. Dig, pp. 919-922, 1991.
    • (1991) IEDM Tech. Dig , pp. 919-922
    • Shibata, T.1    Ohmi, T.2
  • 3
    • 0030270806 scopus 로고    scopus 로고
    • On the application of the neuron MOS transistor principle for modern VLSI design
    • October
    • W. Weber, S. J. Prange, R. Thewes, E. Wohlrab and A. Luck “On the application of the neuron MOS transistor principle for modern VLSI design,” IEEE transactions on Electron Devices, vol. 43, pp. 1700-1708, October 1999.
    • (1999) IEEE Transactions on Electron Devices , vol.43 , pp. 1700-1708
    • Weber, W.1    Prange, S.J.2    Thewes, R.3    Wohlrab, E.4    Luck, A.5
  • 5
    • 0027594722 scopus 로고
    • Neuron MOS. binary-logic integrated circuits-Part II: “Simplifying techniques of circuit configuration and their practical applications
    • May
    • T. Shibata and T. Ohmi, “Neuron MOS. binary-logic integrated circuits-Part II: “Simplifying techniques of circuit configuration and their practical applications”, IEEE transactions on Electron devices, pp. 974-979, May 1993.
    • (1993) IEEE Transactions on Electron Devices , pp. 974-979
    • Shibata, T.1    Ohmi, T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.