Analytical modeling and experimental evaluation of interconnect parasitic inductance on MOSFET switching characteristics

Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Volumn 1, Issue , 2004, Pages 516-521

  Xiao, Y ^a   Shah, H ^a   Chow, T P ^a   Gutmann, R J ^a  

^a RENSSELAER POLYTECHNIC INSTITUTE   (United States)

Author keywords

Interconnection; Packaging; Parasitic inductance; Switching energy loss; Switching transient overshoot

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POTENTIAL; ELECTRIC RESISTANCE; EQUIVALENT CIRCUITS; FREQUENCIES; INDUCTANCE; OSCILLATIONS; PACKAGING; POWER ELECTRONICS; PRINTED CIRCUIT BOARDS; PRODUCT DESIGN; SCHOTTKY BARRIER DIODES; SWITCHING;

INTERCONNECTION; PARASITIC INDUCTANCE; SWITCHING ENERGY LOSS; SWITCHING TRANSIENT OVERSHOOT;

MOSFET DEVICES;

EID: 2342510205     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APEC.2004.1295856     Document Type: Conference Paper

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