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Volumn , Issue , 2004, Pages 336-345

Processor Frequency Selection for SoC Platforms for Multimedia Applications

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN-SPACE EXPLORATION; ENERGY-AWARE PLATFORM; REAL-TIME CONSTRAINTS; SYSTEM-ON-CHIP (SOC) PLATFORMS;

EID: 21644469185     PISSN: 10528725     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/REAL.2004.43     Document Type: Conference Paper
Times cited : (10)

References (14)
  • 3
    • 84893763875 scopus 로고    scopus 로고
    • A general frame-work for analysing system properties in platform-based embedded system designs
    • S. Chakraborty, S. Künzli, and L. Thiele. A general frame-work for analysing system properties in platform-based embedded system designs. In DATE, 2003.
    • (2003) DATE
    • Chakraborty, S.1    Künzli, S.2    Thiele, L.3
  • 4
    • 0037420692 scopus 로고    scopus 로고
    • Performance evaluation of network processor architectures: Combining simulation with analytical estimation
    • S. Chakraborty, S. Künzli, L. Thiele, A. Herkersdorf, and P. Sagmeister. Performance evaluation of network processor architectures: Combining simulation with analytical estimation. Computer Networks, 41(5), 2003.
    • (2003) Computer Networks , vol.41 , Issue.5
    • Chakraborty, S.1    Künzli, S.2    Thiele, L.3    Herkersdorf, A.4    Sagmeister, P.5
  • 5
    • 0035444259 scopus 로고    scopus 로고
    • Viper: A multi-processor SOC for advanced set-top box and digital TV systems. IEEE Design &
    • S. Dutta, R. Jensen, and A. Rieckmann. Viper: A multi-processor SOC for advanced set-top box and digital TV systems. IEEE Design & Test of Computers, 18(5):21-31, 2001.
    • (2001) Test of Computers , vol.18 , Issue.5 , pp. 21-31
    • Dutta, S.1    Jensen, R.2    Rieckmann, A.3
  • 9
    • 2442513349 scopus 로고    scopus 로고
    • Rate analysis for streaming applications with on-chip buffer constraints
    • A. Maxiaguine, S. Künzli, S. Chakraborty, and L. Thiele. Rate analysis for streaming applications with on-chip buffer constraints. In ASP-DAC, 2004.
    • (2004) ASP-DAC
    • Maxiaguine, A.1    Künzli, S.2    Chakraborty, S.3    Thiele, L.4
  • 11
    • 0036042315 scopus 로고    scopus 로고
    • Design of multi-tasking coprocessor control for eclipse
    • M. Rutten, J. van Eijndhoven, and E.-J. Pol. Design of multi-tasking coprocessor control for eclipse. In CODES, 2002.
    • (2002) CODES
    • Rutten, M.1    Van Eijndhoven, J.2    Pol, E.-J.3
  • 12
    • 7244242071 scopus 로고    scopus 로고
    • Robust media processing in a flexible and cost-effective network of multi-tasking coprocessors
    • M. Rutten, J. van Eijndhoven, and E.-J. Pol. Robust media processing in a flexible and cost-effective network of multi-tasking coprocessors. In ECRTS, 2002.
    • (2002) ECRTS
    • Rutten, M.1    Van Eijndhoven, J.2    Pol, E.-J.3
  • 13
    • 0347409177 scopus 로고    scopus 로고
    • Dynamic platform management for configurable platform-based system-on-chips
    • K. Sekar, K. Lahiri, and S. Dey. Dynamic platform management for configurable platform-based system-on-chips. In ICCAD, 2003.
    • (2003) ICCAD
    • Sekar, K.1    Lahiri, K.2    Dey, S.3
  • 14
    • 1342329326 scopus 로고    scopus 로고
    • On-chip traffic modeling and synthesis for MPEG-2 video applications
    • January
    • G. Varatkar and R. Marculescu. On-chip traffic modeling and synthesis for MPEG-2 video applications. IEEE Transactions on VLSI, 12(1), January 2004.
    • (2004) IEEE Transactions on VLSI , vol.12 , Issue.1
    • Varatkar, G.1    Marculescu, R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.