Digital domain time amplification in CMOS process

International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT

Volumn 2, Issue , 2004, Pages 1416-1420

  Oulmane, Mourad ^a   Roberts, Gordon W ^a  

^a MCGILL UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFICATION; AMPLIFIERS (ELECTRONIC); COMPUTER SIMULATION; JITTER; MICROPROCESSOR CHIPS; SIGNAL PROCESSING; TELECOMMUNICATION LINKS; TIME DOMAIN ANALYSIS;

CMOS PROCESSES; ELECTRICAL BEHAVIOR; HIGH SPEED SYSTEMS; TIME-TO-DIGITAL-CONVERTERS (TDC);

CMOS INTEGRATED CIRCUITS;

EID: 21644454482     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. D. Weinlader, Ron Ho, Chih-Kong Keng Yang and M. A. Horowitz, "An eight channel 35Gsample/s CMOS timing analyzer," IEEE Solid-Stale Circuits Conference, pp. 170-171, 2000
2. M. M. Hafed, N. Abaskharoun, G. W. Roberts, "A 4-Ghz effective sample rate integrated test core for analog and mixed-signal circuits," IEEE journal of Solid-State Circuits, pp. 499-514, April 2002
3. M. Oulmane, G. W. Roberts,"A CMOS Time Amplifier for Femto-Second Resolution Timing Measurement," IEEE International Symposium on Circuits and Systems ISCAS, May 2004, pp. 509-512
4. V. Gutnik, A. Chandrakasan, "On-chip picosecond time measurement," Symposium on VLSI Circuits, pp. 52-53, June 2000