SON (Silicon-On-Nothing) technological CMOS Platform: Highly performant devices and SRAM cells

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2004, Pages 635-638

  Monfray, S ^a   Chanemougame, D ^a   Borel, S ^c   Talbot, A ^a   Leverd, F ^a   Planes, N ^a   Delille, D ^b   Dutartre, D ^a   Palla, R ^a   Morand, Y ^a   Descombes, S ^a   Samson, M P ^a   Vulliet, N ^a   Sparks, T ^d   Vandooren, A ^d   Skotnicki, T ^a  

^a STMICROELECTRONICS   (France)

^b NXP SEMICONDUCTORS   (Netherlands)

^c CEA LETI   (France)

^d FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DISPERSIONS; DOPING (ADDITIVES); ELECTROSTATICS; ETCHING; SEMICONDUCTING SILICON COMPOUNDS; STATIC RANDOM ACCESS STORAGE; THRESHOLD VOLTAGE; TRANSCONDUCTANCE; SILICON; VLSI CIRCUITS;

MEMORY CELLS; SILICIDATION; SILICON-ON-NOTHING (SON) DEVICES; TRANSISTOR STRUCTURE;

CMOS INTEGRATED CIRCUITS;

DRIVE CURRENTS; FULLY OPERATIONAL; LOCALISED; PERFORMANCE; SILICON ON NOTHING; SILICON-ON-NOTHING DEVICE; SRAM CELL; STATIC NOISE MARGIN; WRITE MARGIN;

EID: 21644442426     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

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