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Volumn 2002-January, Issue , 2002, Pages 99-102

An assessment of VLSI and embedded software implementations for Reed-Solomon decoders

Author keywords

Decoding; Digital video broadcasting; DSL; Embedded software; Error correction; Error correction codes; Hardware; Reed Solomon codes; Time domain analysis; Very large scale integration

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER GRAPHICS; COMPUTER HARDWARE; DECODING; DIGITAL VIDEO BROADCASTING (DVB); DSL; EMBEDDED SOFTWARE; ERROR CORRECTION; FREQUENCY DOMAIN ANALYSIS; HARDWARE; MODEMS; MULTIMEDIA SYSTEMS; SIGNAL PROCESSING; TIME DOMAIN ANALYSIS; VLSI CIRCUITS;

EID: 21244468054     PISSN: 15206130     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SIPS.2002.1049692     Document Type: Conference Paper
Times cited : (5)

References (8)
  • 3
    • 0035247672 scopus 로고    scopus 로고
    • A Reed-Solomon product-code (RS-PC) decoder chip for DVD applications
    • Feb.
    • H.-C. Chang, C. B. Shung, and C.-Y. Lee, "A Reed-Solomon product-code (RS-PC) decoder chip for DVD applications," IEEE Journal of Solid-State Circuits, vol. 36, issue 2, pp. 229-238, Feb. 2001.
    • (2001) IEEE Journal of Solid-State Circuits , vol.36 , Issue.2 , pp. 229-238
    • Chang, H.-C.1    Shung, C.B.2    Lee, C.-Y.3
  • 4
    • 4243353779 scopus 로고
    • A comparison of VLSI architectures for time and transform domain decoding of Reed-Solomon codes
    • Jet Propulsion Laboratory, Pasadena, CA, Oct-Dec
    • I. S. Hsu, T. K. Truong, L. J. Deutsch, E. H. Satorious, and I. S. Reed, "A comparison of VLSI architectures for time and transform domain decoding of Reed-Solomon codes," Jet Propulsion Laboratory, Pasadena, CA, TDA Progress Rep. 42-92, Oct-Dec. 1989, pp. 63-81.
    • (1989) TDA Progress Rep. , pp. 63-81
    • Hsu, I.S.1    Truong, T.K.2    Deutsch, L.J.3    Satorious, E.H.4    Reed, I.S.5
  • 7
    • 0031276427 scopus 로고    scopus 로고
    • An area-efficient VLSI architecture of a Reed-Solomon decoder/encoder for digital VCRs
    • Nov.
    • S. Kwon, and H. Shin, "An area-efficient VLSI architecture of a Reed-Solomon decoder/encoder for digital VCRs, " IEEE Trans. on Consumer Electronics, vol 434, pp. 1019-1027, Nov. 1997.
    • (1997) IEEE Trans. on Consumer Electronics , vol.434 , pp. 1019-1027
    • Kwon, S.1    Shin, H.2
  • 8
    • 0033100435 scopus 로고    scopus 로고
    • A new scalable VLSI architecture for Reed-Solomon decoders
    • March
    • W. Wilhelm, "A new scalable VLSI architecture for Reed-Solomon decoders," IEEE JSSC, vol. 34, no. 3, pp. 388-396, March 1999.
    • (1999) IEEE JSSC , vol.34 , Issue.3 , pp. 388-396
    • Wilhelm, W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.