Efficient Reed-Solomon decoder VLSI with erasure correction

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn , Issue , 1997, Pages 193-201

  Oh, Kyutaeg ^a   Sung, Wonyong ^a  

^a Seoul National University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; DECODING; DIGITAL SIGNAL PROCESSING; ERROR CORRECTION; HIGH DEFINITION TELEVISION; POLYNOMIALS; REAL TIME SYSTEMS;

CHIEN'S SEARCH ALGORITHM; DIGITAL VERSATILE DISCS (DVD); FIELD PROGRAMMABLE GATE ARRAYS (FPGA); REED SOLOMON DECODERS;

VLSI CIRCUITS;

EID: 0031384035     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)