An area-efficient vlsi architecture of a reed-solomon decoder/encoder for digital VCRs

IEEE Transactions on Consumer Electronics

Volumn 43, Issue 4, 1997, Pages 1019-1027

  Kwon, Sunghoon ^a   Shin, Hyunchul ^a  

^a Hanyang University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; DECODING; POLYNOMIALS; VIDEOCASSETTE RECORDERS; VLSI CIRCUITS;

REED SOLOMON DECODER; REED SOLOMON ENCODER;

IMAGE CODING;

EID: 0031276427     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/30.642367     Document Type: Article

References (11)

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9. C. C. Hsu, I. S. Reed, and T. K. Truong, Use of the RS Decoder as an RS Encoder for Two-Way Digital Communications and Storage Systems, IEEE Trans, on Circuits and Systems for Video Technology, vol. 4. no. 1, pp. 91-92, Feb. 1994.
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