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Volumn 34, Issue 3, 1999, Pages 388-396

A New Scalable VLSI Architecture for Reed-Solomon Decoders

Author keywords

Reed Solomon decoder; Time sharing strategies

Indexed keywords

DECODING; DIGITAL CIRCUITS; INTEGRATED CIRCUIT LAYOUT;

EID: 0033100435     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.748191     Document Type: Article
Times cited : (54)

References (14)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.