Improvements in biasing and compensation of CMOS opamps

Analog Integrated Circuits and Signal Processing

Volumn 43, Issue 3, 2005, Pages 237-245

  Nicolson, Sean ^a   Phang, Khoman ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

Biasing; Compensation; Constant transconductance; Operational amplifiers; Stability

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; ELECTRIC LOADS; ELECTRIC NETWORK TOPOLOGY; OPERATIONAL AMPLIFIERS; PROBLEM SOLVING; PRODUCT DESIGN; TRANSCONDUCTANCE;

BIASING; COMPENSATION; CONSTANT TRANSCONDUCTANCE; OPERATIONAL AMPLIFIERS STABILITY;

CMOS INTEGRATED CIRCUITS;

EID: 21244437974     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1007/s10470-005-1605-2     Document Type: Conference Paper

References (8)

1. K. Martin and D.A.Johns, Analog Integrated Circuit Design. John Wiley & Sons Inc., New York, 1997.
2. A. McLaren and K. Martin, "Generation of Accurate On-Chip Time Constants and Stable Transconductances," IEEE JSSC, vol. 36, no. 4, 2001.
3. A.I.A. Cunha, M.C. Schneider, and C. Galup-Montoro, "An MOS transistor model for analog circuit design," IEEE Journal of Solid-State Circuits, vol. 33, no. 10, 1998.
4. J.M. Steininger, "Understanding wide-hand MOS transistors," IEEE Circuits and Devices, vol. 6, pp. 26-36, 1990.
5. T. Pialis, "Design and analysis techniques for low-voltage, low-jitter voltage-controlled oscillators," M. Eng. Thesis Dissertation, University of Toronto, Department of Electrical Engineering, Toronto, 2002.
6. I.E. Opris and L.D. Lewicki, "Bias optimization for switched capacitor amplifiers," IEEE TCAS - II, vol. 44, no. 12, 1997.
7. J. Chen and B. Shi, "Novel constant transconductance references and the comparisons with the traditional approach," SW Sym. Mixed-Sig. Des., 2003, pp. 104-107.
8. C.Y. Kwok, "Low-voltage peaking complementary current generator," IEEE JSSC ,vol. SC-20, no. 3, pp. 816-818, 1985.