Generation of accurate on-chip time constants and stable transconductances

IEEE Journal of Solid-State Circuits

Volumn 36, Issue 4, 2001, Pages 691-695

  McLaren, Angus ^b   Martin, Ken ^a,b  

^a IEEE   (Canada)

^b UNIVERSITY OF TORONTO   (Canada)

Author keywords

Adaptive systems; CMOS analog integrated circuits; CMOS bias circuits; Phase locked loops

Indexed keywords

CMOS BIAS CIRCUIT; ON CHIP TIME CONSTANTS;

ADAPTIVE SYSTEMS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC POWER SUPPLIES TO APPARATUS; JITTER; PHASE LOCKED LOOPS; THERMAL EFFECTS; TRANSISTORS;

TRANSCONDUCTANCE;

EID: 0035308548     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.913748     Document Type: Article

References (14)

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4. Obtaining accurate on-chip time-constants and conductances
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6. A 4-MHz CMOS continuous-time filter with on-chip automatic tuning
7. High-speed voltage-controlled oscillator with quadrature outputs
8. Jitter in ring oscillators
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11. A 960-Mb/s/pin interface for skew-tolerant bus using low jitter PLL
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