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Volumn , Issue , 2004, Pages 329-338

Testing micropipelined asynchronous circuits

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS CIRCUITS; CONVENTIONAL CIRCUITS; MICROPIPELINE; TESTING METHODS;

EID: 18144429142     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (5)

References (16)
  • 6
    • 18144417771 scopus 로고
    • An organization for checking experiments on sequential circuits
    • C. R. Kime. An Organization for Checking Experiments on Sequential Circuits. IEEE Transactions on Electronic Computers, pages 113-115, 1966.
    • (1966) IEEE Transactions on Electronic Computers , pp. 113-115
    • Kime, C.R.1
  • 10
    • 0030173207 scopus 로고    scopus 로고
    • Four-phase micropipeline latch control circuits
    • June
    • S. B. Furber and P. Day. Four-Phase Micropipeline Latch Control Circuits. IEEE Transactions on VLSI Systems, pages 247-253, June 1996.
    • (1996) IEEE Transactions on VLSI Systems , pp. 247-253
    • Furber, S.B.1    Day, P.2
  • 11
    • 0032188345 scopus 로고    scopus 로고
    • Reduced complexity two-phase micropipeline latch controller
    • Oct.
    • G. S. Taylor and G. M. Blair. Reduced Complexity Two-Phase Micropipeline Latch Controller. IEEE Journal of Solid-State Circuits, pages 1590-1593, Oct. 1998.
    • (1998) IEEE Journal of Solid-State Circuits , pp. 1590-1593
    • Taylor, G.S.1    Blair, G.M.2
  • 12
    • 0032307319 scopus 로고    scopus 로고
    • Sequential test generation: Past, present and future
    • Dec.
    • Y. Kim and K. K. Saluja. Sequential Test Generation: Past, Present and Future. Integration - The VLSI Journal, pages 41-54, Dec. 1998.
    • (1998) Integration - the VLSI Journal , pp. 41-54
    • Kim, Y.1    Saluja, K.K.2
  • 15
    • 0036446340 scopus 로고    scopus 로고
    • Automatic scan insertion and test generation for asynchronous circuits
    • F. Beest et al. Automatic Scan Insertion and Test Generation for Asynchronous Circuits. Proceedings of the International Test Conference, pages 804-813, 2002.
    • (2002) Proceedings of the International Test Conference , pp. 804-813
    • Beest, F.1
  • 16
    • 0025417241 scopus 로고
    • The BALLAST methodology for structured partial scan design
    • April
    • R. Gupta, R. Gupta and M. A. Breuer. The BALLAST Methodology for Structured Partial Scan Design. IEEE Transactions on Computers, pages 538-544, April 1990.
    • (1990) IEEE Transactions on Computers , pp. 538-544
    • Gupta, R.1    Gupta, R.2    Breuer, M.A.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.