Impact of technology scaling on substrate noise generation mechanisms

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2004, Pages 501-504

  Badaroglu, Mustafa ^a,b   Wambacq, Piet ^a   Van Der Plas, Geert ^a   Donnay, Stéphane ^a   Gielen, Georges ^b   De Man, Hugo ^a,b  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BOUNDARY CONDITIONS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; COUPLED CIRCUITS; DIGITAL CIRCUITS; ELECTRICITY; IMPACT IONIZATION; SPURIOUS SIGNAL NOISE; SUBSTRATES; SWITCHING;

DIGITAL DESIGN TECHNIQUES; POWER-SUPPLY-LINE COUPLING; SUBSTRATE NOISE; SWITCHING TIME;

INTEGRATED CIRCUITS;

EID: 17044422992     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. S. Donnay and G. Gielen, editors, "Substrate noise coupling in mixed-signal IC's," Kluwer Academic Publishers, 2003.
2. J. Briaire and K.S. Krisch, "Principles of substrate crosstalk generation in CMOS circuits," IEEE TCAD, vol. 19, no. 6, pp. 645-653, June 2000.
3. R. Senthinathan and J.L. Prince, "Simultaneous switching ground noise calculation for packaged CMOS devices," IEEE JSSC, Vol.26, No.11, pp. 1724-1728, Nov. 1991.
4. M. Nagata et al., "Physical design guides for substrate noise reduction in cmos digital circuits," IEEE JSSC, vol. 36, no. 3, pp. 539-549, 2001.
5. X. Aragones et al., "Substrate coupling trends in future CMOS technologies," Proc. PATMOS, pp. 235-244, Sept. 1997.
6. P. Larsson, "Power supply noise in future IC's: a crystal ball reading," in IEEE Proc. CICC, pp. 467-474,1999.
7. ITRS 2002 Edition - http://public.itrs.net.
8. K. Sakui et al., "The effects of impact ionization on the operation of neighboring devices and circuits," IEEE Tr. Electron Devices, Vol. 41, No. 9, pp. 1603-1607, Sept. 1994.
9. SubstrateStorm tool from Cadence: http://www.cadence.com.
10. R.H. Dennard et al., "Design of ion-implanted MOSFETs with very small physical dimensions," IEEE JSSC, vol. 9, No. 5, pp. 256-268, 1974.
11. M. Badaroglu et al., "Modeling and experimental verification of substrate noise generation in a 220KGates WLAN system-on-chip with multiple supplies," IEEE JSSC, Vol. 38, No. 7, pp. 1250-1260, 2003.