A CMOS high efficiency +22 dBm linear power amplifier

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2004, Pages 557-560

  Ding, Yongwang ^a   Harjani, Ramesh ^b  

^a Bermai Inc   (United States)

^b UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POWER FACTOR MEASUREMENT; GAIN CONTROL; MICROPROCESSOR CHIPS; MOSFET DEVICES; SIGNAL PROCESSING; SOFTWARE PROTOTYPING; SPATIAL VARIABLES MEASUREMENT; THRESHOLD VOLTAGE; TRANSISTORS;

POWER ADDED EFFICIENCY (PAE); POWER CONSUMPTION; POWER SUPPLY REJECTION RATIO (PSRR); SIGNAL-TO-DISTORTION RATIO (SDR);

POWER AMPLIFIERS;

EID: 17044420862     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

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