Crosstalk coupling effects of CMOS Co-planar spiral inductors

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2004, Pages 371-374

  Mikkelsen, Jan Hvolgaard ^a   Jensen, Ole Kiel ^a   Larsen, Torben ^a  

^a AALBORG UNIVERSITY   (Denmark)

Author keywords

[No Author keywords available]

Indexed keywords

3D SIMULATIONS; CIRCUIT SIMULATIONS; CROSSTALK COUPLING EFFECTS; INDUCTIVE COUPLING;

CAPACITANCE; CAPACITORS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; COUPLED CIRCUITS; CROSSTALK; ELECTRIC CURRENTS; ELECTROMAGNETIC WAVE ATTENUATION; EQUIVALENT CIRCUITS; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; THREE DIMENSIONAL;

ELECTRIC INDUCTORS;

EID: 17044393928     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

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2. J. Raskin, A. Viviani, D. Flandre, and J. Colinge, "Substrate Crosstalk Reduction using SOI Technology," IEEE Transactions on Electron Devices, vol. 44, pp. pp. 2252-2261, December 1997.
3. A. Pun, T. Yeung, J. Lau, F. Ciment, and D. Su, "Substrate Noise Coupling Through Planar Spiral Inductor," IEEE Journal of Solid-State Circuits, vol. 33, pp. pp. 877-884, June 1998.
4. T. Kolding, "A Four-Step Method for De-Embedding Giga-Hertz On-Wafer CMOS Measurements," IEEE Transactions on Electron Devices, vol. 47, pp. pp. 734-740, April 2000.
5. T. Kolding, O. Jensen, and T. Larsen, "Ground-Shielded Measuring Technique for Accurate On-Wafer Characterization of RF CMOS Devices," in International Conference on Microelectronic Test Structures, (-), pp. pp. 246-251, IEEE, March 2000.
6. C.-J. Chao, S.-C. Wong, C.-J. Hsu, M.-J. Chen, and L.-Y. Leu, "Characterization and Modeling of On-Chip Inductor Substrate Coupling Effect," in Radio Frequency Integrated Circuits Symposium, (Seattle, WA, USA), pp. pp. 311-314, IEEE, June 2002.