Synthesis of Fully Testable Circuits From BDDs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 23, Issue 3, 2004, Pages 440-443

  Drechsler, Rolf ^a   Shi, Junhao ^a   Fey, Görschwin ^a  

^a UNIVERSITY OF BREMEN   (Germany)

Author keywords

Binary decision diagrams (BDDs); Decision diagrams; Design for testability; Logic synthesis; Multiplexor based circuits

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; DECISION THEORY; ELECTRIC INVERTERS; MATHEMATICAL MODELS; MULTIPLEXING; OPTIMIZATION; POLYNOMIALS;

BINARY DECISION DIAGRAMS (BDD); LOGIC SYNTHESIS;

ELECTRONIC EQUIPMENT TESTING;

EID: 1642312095     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.823342     Document Type: Article

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