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Volumn , Issue , 2004, Pages 240-243

Constant-load energy recovery memory for efficient high-speed operation

Author keywords

Adiabatic circuitry; Cache memories; Charge recovery; Low energy design; Low power computing; On chip memories

Indexed keywords

BUFFER STORAGE; CAPACITANCE; COMPUTER SIMULATION; ELECTRIC POWER SYSTEMS; ENERGY DISSIPATION; ENERGY EFFICIENCY; WAVEFORM ANALYSIS;

EID: 16244400466     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1013235.1013296     Document Type: Conference Paper
Times cited : (4)

References (9)
  • 2
    • 0032070395 scopus 로고    scopus 로고
    • A 32 × 32-b adiabatic register file with supply clock generator
    • May
    • Y. Moon and O.K. Jeong, "A 32 × 32-b adiabatic register file with supply clock generator," IEEE Journal of Solid-State Circuits, vol. 33, no. 5, pp. 696-701, May 1998.
    • (1998) IEEE Journal of Solid-State Circuits , vol.33 , Issue.5 , pp. 696-701
    • Moon, Y.1    Jeong, O.K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.