New models of prefix adder topologies

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 40, Issue 1, 2005, Pages 125-141

  Burgess, Neil ^a,b  

^a CARDIFF UNIVERSITY   (United Kingdom)

^b Icera Semiconductor   (United Kingdom)

Author keywords

Absolute difference; Delay model; Idempotency; Prefix addition; VLSI

Indexed keywords

ABSOLUTE DIFFERENCE; DELAY MODELS; IDEMPOTENCY; PREFIX ADDITION;

ALGORITHMS; COMPUTATIONAL COMPLEXITY; DIGITAL ARITHMETIC; LOGIC GATES; MATHEMATICAL MODELS; TOPOLOGY; VLSI CIRCUITS;

ADDERS;

EID: 14844354024     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11265-005-4942-6     Document Type: Conference Paper

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