-
1
-
-
0029221856
-
Stretching quasi delay insensitivity by means of extended isochronic forks
-
IEEE Computer Society Press, May
-
Kees van Berkel, Ferry Huberts, and Ad Peeters. Stretching quasi delay insensitivity by means of extended isochronic forks. In Asynchronous Design Methodologies, pages 99-106. IEEE Computer Society Press, May 1995.
-
(1995)
Asynchronous Design Methodologies
, pp. 99-106
-
-
Van Berkel, K.1
Huberts, F.2
Peeters, A.3
-
3
-
-
0034853842
-
Robust interfaces for mixed-timing systems with application to latency-insensitive protocols
-
June
-
Tiberiu Chelcea and Steven M. Nowick. Robust interfaces for mixed-timing systems with application to latency-insensitive protocols. In Proc. ACM/IEEE Design Automation Conference, June 2001.
-
(2001)
Proc. ACM/IEEE Design Automation Conference
-
-
Chelcea, T.1
Nowick, S.M.2
-
5
-
-
77957968874
-
Clock synchronization through handshake signalling
-
April
-
Joep Kessels, Ad Peeters, Paul Wielage, and Suk-Jin Kim. Clock synchronization through handshake signalling. In Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pages 59-68, April 2002.
-
(2002)
Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems
, pp. 59-68
-
-
Kessels, J.1
Peeters, A.2
Wielage, P.3
Kim, S.-J.4
-
6
-
-
0002927123
-
Programming in VLSI: From communicating processes to delay-insensitive circuits
-
C. A. R. Hoare, editor, UT Year of Programming Series, Addison-Wesley
-
Alain J. Martin. Programming in VLSI: From communicating processes to delay-insensitive circuits. In C. A. R. Hoare, editor, Developments in Concurrency and Communication, UT Year of Programming Series, pages 1-64. Addison-Wesley, 1990.
-
(1990)
Developments in Concurrency and Communication
, pp. 1-64
-
-
Martin, A.J.1
-
8
-
-
0016920527
-
Anomalous response times of input synchronizers
-
February
-
Miroslav Pečhouček. Anomalous response times of input synchronizers. IEEE Transactions on Computers, 25(2):133-139, February 1976.
-
(1976)
IEEE Transactions on Computers
, vol.25
, Issue.2
, pp. 133-139
-
-
Pečhouček, M.1
-
9
-
-
0001951703
-
System timing
-
Carver A. Mead and Lynn A. Conway, editors, chapter 7. Addison-Wesley
-
Charles L. Seitz. System timing. In Carver A. Mead and Lynn A. Conway, editors, Introduction to VLSI Systems, chapter 7. Addison-Wesley, 1980.
-
(1980)
Introduction to VLSI Systems
-
-
Seitz, C.L.1
-
11
-
-
0035186879
-
MOUSETRAP: Ultra-high-speed transition-signaling asynchronous pipelines
-
November
-
Montek Singh and Steven M. Nowick. MOUSETRAP: Ultra-high-speed transition-signaling asynchronous pipelines. In Proc. International Conf. Computer Design (ICCD), pages 9-17, November 2001.
-
(2001)
Proc. International Conf. Computer Design (ICCD)
, pp. 9-17
-
-
Singh, M.1
Nowick, S.M.2
-
12
-
-
0033280795
-
Pausible clocking-based heterogeneous systems
-
December
-
Kenneth Y. Yun and A. E. Dooply. Pausible clocking-based heterogeneous systems. IEEE Transactions on VLSI Systems, 7(4):482-488, December 1999.
-
(1999)
IEEE Transactions on VLSI Systems
, vol.7
, Issue.4
, pp. 482-488
-
-
Yun, K.Y.1
Dooply, A.E.2
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