Transient-Fault Recovery for Chip Multiprocessors

IEEE Micro

Volumn 23, Issue 6, 2003, Pages 76-83

  Gomaa, Mohamed A ^a,b   Scarbrough, Chad ^a   Vijaykumar, T N ^b   Pomeranz, Irith ^a  

^a Purdue University   (United States)

^b PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT RECOVERY; INTERPROCESSOR COMMUNICATION; MULTITHREADING;

BANDWIDTH; BENCHMARKING; COMPUTER SIMULATION; ERROR CORRECTION; FAULT TOLERANT COMPUTER SYSTEMS; REAL TIME SYSTEMS; TRANSISTORS;

MICROPROCESSOR CHIPS;

EID: 1342325003     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2003.1261390     Document Type: Review

References (6)

1. S.S. Mukherjee, M. Kontz, and S.K. Reinhardt, "Detailed Design and Evaluation of Redundant Multithreading Alternatives," Proc. 29th Ann. Int'l Symp. Computer Architecture (ISCA 02), IEEE CS Press, 2002, pp. 99-110.
2. E. Rotenberg, "AR-SMT: A Microarchitectural Approach to Fault Tolerance in Microprocessors," Proc. 29th Ann. Int'l Symp. Fault-Tolerant Computing (FTCS 99), IEEE CS Press, 1999, pp. 84-91.
3. K. Sundaramoorthy, Z. Purser, and E. Rotenberg, "Slipstream Processors: Improving Both Performance and Fault Tolerance," Proc. 9th Int'l Symp. Architectural Support for Programming Languages and Operating Systems (ASPLOS 2000), ACM Press, 2000, pp. 257-268.
4. S.K. Reinhardt and S.S. Mukherjee, "Transient Fault Detection via Simultaneous Multi-threading," Proc. 27th Ann. Int'l Symp. Computer Architecture (ISCA 2000), ACM Press, 2000, pp. 25-36.
5. T.N. Vijaykumar, I. Pomeranz, and K. Cheng, "Transient-Fault Recovery Using Simultaneous Multithreading," Proc. 29th Ann. Int'l Symp. Computer Architecture (ISCA 02), IEEE CS Press, 2002, pp. 87-98.
6. M. Gomaa, C. Scarbrough, T.N. Vijaykumar, and I. Pomeranz, "Transient-Fault Recovery for Chip Multiprocessors," Proc. 30th Ann. Int'l Symp. Computer Architecture (ISCA 03), IEEE CS Press, 2003.