Vertical SiGe-based silicon-on-nothing (SON) technology for sub-30 nm MOS devices

Materials Science in Semiconductor Processing

Volumn 8, Issue 1-3 SPEC. ISS., 2005, Pages 51-57

  Thompson, Phillip E ^a   Jernigan, Glenn ^a   Schulze, Joerg ^b   Eisele, Ignaz ^b   Suligoj, Tomislav ^c  

^a NAVAL RESEARCH LABORATORY   (United States)

^b BUNDESWEHR UNIVERSITY MUNICH   (Germany)

^c UNIVERSITY OF ZAGREB   (Croatia)

Author keywords

Silicon on nothing; Vertical MOSFET

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; EPITAXIAL GROWTH; LITHOGRAPHY; METALLORGANIC CHEMICAL VAPOR DEPOSITION; MOSFET DEVICES; REACTIVE ION ETCHING; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTING SILICON COMPOUNDS; SILICA; SILICON ON INSULATOR TECHNOLOGY;

EPITAXIAL DEPOSITION; GATE OXIDES (GOX); SILICON-ON-NOTHING (SON) TECHNOLOGY; VERTICAL MOSFET;

MOS DEVICES;

EID: 13244279730     PISSN: 13698001     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mssp.2004.09.081     Document Type: Conference Paper

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