Testing for missing-gate faults in reversible circuits

Proceedings of the Asian Test Symposium

Volumn , Issue , 2004, Pages 100-105

  Hayes, John P ^a,b   Polian, Ilia ^b   Becker, Bernd ^b  

^a UNIVERSITY OF MICHIGAN   (United States)

^b UNIVERSITY OF FREIBURG   (Germany)

Author keywords

Design for test; Fault models; Missing gate faults; Quantum circuits; Reversible circuits

Indexed keywords

BOOLEAN FUNCTIONS; COMPUTATIONAL METHODS; DESIGN FOR TESTABILITY; FAULT TREE ANALYSIS; MATHEMATICAL MODELS; OPTIMIZATION; SIGNAL PROCESSING; VECTORS;

FAULT MODELS; MISSING GATE FAULTS; QUANTUM CIRCUITS; REVERSIBLE CIRCUITS;

LOGIC CIRCUITS;

EID: 13244264684     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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