The impact of recent DRAM architectures on embedded systems performance

Conference Proceedings of the EUROMICRO

Volumn 1, Issue , 2000, Pages 282-289

  Gries, Matthias ^a  

^a ETH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDED COMPUTING SYSTEM; MEMORY CONTROLLER; MEMORY HIERARCHY; MEMORY INTERFACE; PERFORMANCE GAIN; SYNCHRONOUS DRAMS; SYSTEMS PERFORMANCE; UNDERLYING DYNAMICS;

COMPUTER SIMULATION; MEMORY ARCHITECTURE;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 13144271140     PISSN: 10896503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EURMIC.2000.874644     Document Type: Conference Paper

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