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Volumn 4, Issue , 2001, Pages 226-229

A low power 10-transistor full adder cell for embedded architectures

Author keywords

Addition; Full adder; low power

Indexed keywords

ADDITION; DEVELOPMENT TOOLS; EMBEDDED ARCHITECTURE; FULL ADDERS; LOW POWER; LOW-POWER CONSUMPTION; STANDARD TRANSMISSION; SWITCHING ACTIVITIES;

EID: 12744279044     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.922213     Document Type: Conference Paper
Times cited : (39)

References (8)
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  • 3
    • 0029290334 scopus 로고
    • Overview of low-power ulsi circuit techniques
    • April
    • Tadahiro Kurodaand and Takyasu Sakurai, "Overview of Low-Power ULSI Circuit Techniques," EEICE Trans Electronics, Vol. E78-c, NO. 4, April 1995.
    • (1995) EEICE Trans Electronics , vol.E78-C , Issue.4
    • Kurodaand, T.1    Sakurai, T.2
  • 4
    • 0028467137 scopus 로고
    • New efficient designs for xor and xnor functions on the transistor level
    • July
    • Jyh-Ming Wang, Sung-Chuan Fang, Wu-Shiung Feng, "New Efficient Designs for XOR and XNOR Functions on the Transistor Level" IEEE J. of Solid-State Circuits, Vol. 29, No. 7, pp. 780-786, July 1994.
    • (1994) IEEE J. of Solid-State Circuits , vol.29 , Issue.7 , pp. 780-786
    • Wang, J.1    Fang, S.2    Feng, W.3
  • 5
    • 0031189144 scopus 로고    scopus 로고
    • Low-power logic styles: Cmos versus pass-transistor logic
    • July
    • Reto Zimmermann and Wolfgang Fichtner, "Low-Power Logic Styles: CMOS Versus Pass-Transistor Logic," IEEE J. Of Solid-State Circuits, Vol 32. No. 7, July 1997.
    • (1997) IEEE J. of Solid-State Circuits , vol.32 , Issue.7
    • Zimmermann, R.1    Fichtner, W.2
  • 6
    • 0033730819 scopus 로고    scopus 로고
    • A novel high-performance cmos 1-bit full adder celf ieee trans
    • May
    • A. M. Shams and Magdy A. Bayoumi, " A Novel High-Performance CMOS 1-Bit Full Adder CelF IEEE Trans. Circuits and Systems-U, Vol.47 No.5, May 2000.
    • (2000) Circuits and Systems-U , vol.47 , Issue.5
    • Shams, A.M.1    Bayoumi, M.A.2
  • 8
    • 0030083958 scopus 로고    scopus 로고
    • Area-efficient multipliers for digital signal processing applications
    • February
    • Sunder S.Kidambi and Fayez El-Guibaly, "Area-Efficient Multipliers for Digital Signal Processing Applications," IEEE Trans. Circuits and Systems-U, Vol.43. No.2, February 1996.
    • (1996) IEEE Trans. Circuits and Systems-U , vol.43 , Issue.2
    • Kidambi, S.S.1    El-Guibaly, F.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.