-
1
-
-
0031212918
-
Flash memory cells - An overview
-
Aug.
-
P. Pavan, R. Bez, P. Olivo, and E. Zanoni, "Flash memory cells - An overview," Proc. IEEE, vol. 85, pp. 1248-1271, Aug. 1997.
-
(1997)
Proc. IEEE
, vol.85
, pp. 1248-1271
-
-
Pavan, P.1
Bez, R.2
Olivo, P.3
Zanoni, E.4
-
2
-
-
0035445243
-
Basic feasibility constraints for multilevel CHE-programmed Flash memories
-
Sept.
-
A. Modelli, A. Manstretta, and G. Torelli, "Basic feasibility constraints for multilevel CHE-programmed Flash memories," IEEE J. Solid-State Circuits, vol. 48, pp. 2032-2041, Sept. 2001.
-
(2001)
IEEE J. Solid-state Circuits
, vol.48
, pp. 2032-2041
-
-
Modelli, A.1
Manstretta, A.2
Torelli, G.3
-
3
-
-
0034297544
-
Monte Carlo simulation of the CHISEL Flash memory cell
-
Oct.
-
J. D. Bude, M. R. Pinto, and R. K. Smith, "Monte Carlo simulation of the CHISEL Flash memory cell," IEEE Trans. Electron Devices, vol. 47, pp. 1873-1881, Oct. 2000.
-
(2000)
IEEE Trans. Electron Devices
, vol.47
, pp. 1873-1881
-
-
Bude, J.D.1
Pinto, M.R.2
Smith, R.K.3
-
4
-
-
36849097956
-
2
-
Jan.
-
2," J. Appl. Phys., vol. 40, no. 1, pp. 278-283, Jan. 1969.
-
(1969)
J. Appl. Phys.
, vol.40
, Issue.1
, pp. 278-283
-
-
Lenzilinger, M.1
Snow, E.H.2
-
5
-
-
0036540521
-
Constant charge erasing scheme for Flash memories
-
Apr.
-
A. Chimenton, P. Pellati, and P. Olivo, "Constant charge erasing scheme for Flash memories," IEEE Trans. Electron Devices, vol. 49, pp. 613-618, Apr. 2002.
-
(2002)
IEEE Trans. Electron Devices
, vol.49
, pp. 613-618
-
-
Chimenton, A.1
Pellati, P.2
Olivo, P.3
-
6
-
-
0025433611
-
The use and evaluation of yield models in integrated circuit manufacturing
-
May
-
J. Cunningham, "The use and evaluation of yield models in integrated circuit manufacturing," IEEE J. Solid-State Circuits, vol. 3, pp. 60-71, May 1990.
-
(1990)
IEEE J. Solid-state Circuits
, vol.3
, pp. 60-71
-
-
Cunningham, J.1
-
7
-
-
0025470209
-
A discussion of yield modeling with defect clustering, circuit repir and circuit redundancy
-
Aug.
-
T. Michalka et al., "A discussion of yield modeling with defect clustering, circuit repir and circuit redundancy," IEEE J. Solid-State Circuits, vol. 3, pp. 116-127, Aug. 1990.
-
(1990)
IEEE J. Solid-state Circuits
, vol.3
, pp. 116-127
-
-
Michalka, T.1
-
8
-
-
0027632613
-
Improved yield model for fault-tolerant memory chips
-
Jul.
-
C. Stapper, "Improved yield model for fault-tolerant memory chips," IEEE Trans. Comput., vol. 42, no. 7, Jul. 1993.
-
(1993)
IEEE Trans. Comput.
, vol.42
, Issue.7
-
-
Stapper, C.1
-
9
-
-
0004038844
-
-
Norwell, MA: Kluwer
-
P. Cappelletti, C. Golla, P. Olivo, and E. Zanoni, Flash Memories. Norwell, MA: Kluwer, 1999.
-
(1999)
Flash Memories
-
-
Cappelletti, P.1
Golla, C.2
Olivo, P.3
Zanoni, E.4
-
10
-
-
0024612096
-
A built-in hamming code ECC circuit for DRAM's
-
Feb.
-
K. Furutani et al., "A built-in hamming code ECC circuit for DRAM's," IEEE J. Solid-State Circuits, vol. 24, pp. 50-56, Feb. 1989.
-
(1989)
IEEE J. Solid-state Circuits
, vol.24
, pp. 50-56
-
-
Furutani, K.1
-
11
-
-
0025505721
-
A 50-ns 16-Mb DRAM with a 10-ns data rate and on-chip ECC
-
Oct.
-
H. Kalter et al., "A 50-ns 16-Mb DRAM with a 10-ns data rate and on-chip ECC," IEEE J. Solid-State Circuits, vol. 25, pp. 1118-1128, Oct. 1990.
-
(1990)
IEEE J. Solid-state Circuits
, vol.25
, pp. 1118-1128
-
-
Kalter, H.1
-
12
-
-
0343651473
-
A 4-Mbit DRAM with 16-bit concurrent ECC
-
Feb.
-
T. Yamada et al., "A 4-Mbit DRAM with 16-bit concurrent ECC," IEEE J. Solid-State Circuits, vol. SC-23, pp. 20-25, Feb. 1988.
-
(1988)
IEEE J. Solid-state Circuits
, vol.SC-23
, pp. 20-25
-
-
Yamada, T.1
-
14
-
-
0034430972
-
2 3 v 50 MHz 64 Mb 4-level cell NOR-type Flash memory
-
2 3 V 50 MHz 64 Mb 4-level cell NOR-type Flash memory," in IEEE Int. Solid-State Circuits Conf., Dig. Tech. Papers, 2000, pp. 274-275, 464.
-
(2000)
IEEE Int. Solid-state Circuits Conf., Dig. Tech. Papers
, pp. 274-275
-
-
Campardo, G.1
Micheloni, R.2
Commodaro, S.3
Yero, E.4
Zammabio, M.5
Mognoni, S.6
Sacco, A.7
Picca, M.8
Manstleita, A.9
Scotti, M.10
Motta, I.11
Golla, C.12
Pierin, A.13
Ohba, A.14
Fulatsuya, T.15
Makabe, R.16
Kawai, S.17
Kai, Y.18
Shimizu, S.19
Ohnakado, T.20
Sugihara, I.21
Bez, R.22
Grossi, A.23
Modelli, A.24
Khouri, P.O.25
Torelli, G.26
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