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Volumn 91, Issue 4, 2003, Pages 569-580

An overview of logic architectures inside flash memory devices

Author keywords

Burst mode; Error correction code (ECC); Multilevel cell; NOR Flash memory; Page mode; Program erase controller; Redundancy; Unerasable programmable ROM (UPROM)

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); COMPUTER SYSTEMS PROGRAMMING; DATA STORAGE EQUIPMENT; ERROR CORRECTION; INTERFACES (COMPUTER); LOGIC CIRCUITS; PROM; REDUNDANCY;

EID: 11144235303     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/JPROC.2003.811707     Document Type: Review
Times cited : (22)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.