Reliability of pFET EEPROM with 70-Å Tunnel Oxide manufactured in generic logic CMOS processes

IEEE Transactions on Device and Materials Reliability

Volumn 4, Issue 3, 2004, Pages 353-357

  Ma, Yanjun ^a   Gilliland, Troy ^a   Wang, Bin ^a   Paulsen, Ron ^a   Pesavento, Alberto ^a   Wang, C H ^a   Nguyen, Hoc ^a   Humes, Todd ^a   Diorio, Chris ^a  

^a Impinj   (United States)

Author keywords

CMOS memory integrated circuits; EPROM; Reliability; Reliability model

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; ELECTRON TUNNELING; FIELD EFFECT TRANSISTORS; IONIZATION; MATHEMATICAL MODELS; RELIABILITY; THERMAL EFFECTS;

CMOS MEMORY INTEGRATED CIRCUITS; EPROM; HOT-ELECTRON INJECTION; RELIABILITY MODEL;

PROM;

EID: 11144227944     PISSN: 15304388     EISSN: None     Source Type: Journal    
DOI: 10.1109/TDMR.2004.837119     Document Type: Article

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