Embedded flash memory for security applications in a 0.13μm CMOS logic process

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Raszka, Jaroslav ^a   Advani, Manik ^a   Tiwari, Vipin ^a   Varisco, Laura ^a   Der Hacobian, Narbeh ^a   Mittal, Anurag ^a   Han, Michael ^a   Shirdel, Al ^a   Shubat, Alexander ^a  

^a Virage Logic   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

NON-VOLATILE MEMORIES (NVM); PARALLEL MEMORIES; PROGRAMMING VOLTAGE;

CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; ELECTRON TUNNELING; EMBEDDED SYSTEMS; INTERFACES (COMPUTER); LOGIC CIRCUITS; MICROPROCESSOR CHIPS; RANDOM ACCESS STORAGE; SECURITY OF DATA;

FLASH MEMORY;

EID: 2442678914     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. R. J. McPartland et al., "1.25V, Low-Coat, Embedded FLASH Memory for Low-Density Applications," Symp. VLSI Circuits Dig., pp. 158-161, Jun. 2000.
2. K. Ohsaki, et al., "A Single Poly EEPROM Cell Structure for Use in Standard CMOS Processes," IEEE J. of Solid-State Circuits, vol. 29, pp. 311-316, Mar. 1994.
3. Z. A. Weinberg, "On Tunneling in Metal-Oxide-Silicon Structures," J. of Applied Physics, vol. 53, pp. 5052-5056, Jul. 1982.
4. P. Favrat, et al, "A High-Efficiency CMOS Voltage Doubler," IEEE J. Solid-State Circuits, vol. 33, pp. 410-416, Mar. 1998.