Non-volatile memory device with true CMOS compatibility

Electronics Letters

Volumn 35, Issue 17, 1999, Pages 1443-1445

  Chang, L ^a   Kuo, C ^a   Hu, Chenming ^a   Kalnitsky, A ^b   Bergemont, A ^b   Francis, P ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b NATIONAL SEMICONDUCTOR CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; EMBEDDED SYSTEMS; TRANSISTORS;

GATE ELECTRODES;

NONVOLATILE STORAGE;

EID: 0032652739     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19990983     Document Type: Article

References (5)

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2. HOE, D.: 'Cell and circuit design for single-poly EPROM', IEEE J. Solid-State Circuits, 1989, 24, (4), pp. 1153-1157
3. FROHMAN-BENTCHKOWSKY, D.: 'FAMOS - A new semiconductor charge storage device', Solid-State Electron., 1974, 17, pp. 517-529
4. ONG, T.-C., SEKI, K., KO, P.K., and HU, C.: 'P-MOSFET gate current and device degradation'. Symp. VLSI Technology, 1989, pp. 193-196
5. HU, C.: 'Hot electron effects in MOSFET's'. IEDM Tech. Dig., 1983, pp. 176-181